Rockwell International Corporation

Rajiv Gupta

Daryush Shamlou

Raouf Halim

John R Spence

Edward W MacRobbie

Eugene Robert Worley

Addison B Jones

Ming M Zhang

Mingming Zhang

An on-board regulated voltage up-convertor for converting a first DC voltage at a first node from an electronic system to a second DC voltage for an integrated device at a second node. The convertor comprises reference generator means for generating a predetermined reference voltage at start-up, voltage regulator means coupled to said first node for regulating said first voltage at a predetermined voltage at a third node, voltage multiplier means coupled to said third node and to said second node for multiplying said predetermined voltage to generate an output voltage substantially equal to said second voltage, feedback means coupled to said second node for feeding said output voltage back to said voltage regulator means to adjust the level of said predetermined voltage at said third node according to how said output voltage is relative to said second voltage.

Efficient, well regulated, DC-DC power supply up-converter for CMOS

A circuit for converting a system supply voltage having one of two levels to a voltage for use by an integrated analog circuit connected to the system upon power-up. The circuit uses a diode-connected transistor to generate a reference voltage necessary for a regulator to regulate the supply voltage when the supply voltage is first powered up. The regulated supply voltage is doubled to a voltage level sufficient to activate the integrated analog circuit's bandgap voltage. The activated bandgap voltage is thus switched on to supply a more precise reference voltage to the regulator so that the diode-connected transistor may be de-activated to conserve power. The circuit also provides a bypass path for connecting the supply voltage directly to the integrated analog circuit when the supply voltage is the same level as the necessary voltage for the integrated analog circuit.

Accurate reference generation technique valid during system power-up

A novel supply discriminator circuit is disclosed for detecting the level of a supply voltage during power-up of a system for configuring an integrated analog circuit such as a PCMCIA card. The circuit compares a reference voltage with a divided down supply voltage and latches the result a predetermined delay later. The delay thus provides timing for the supply voltage to stabilize after power-up to assure accurate detection, as well as noise immunity from other devices.

Supply-discriminating supply-adaptive electronic system

The LOW POWER CRYSTAL OSCILLATOR shown here reduces power consumption of a Pierce oscillator which has an inverter preferably made of an NFET N0 and a PFET P0 in series. A load, preferably an NFET N1 with its gate wired to its source, is placed in parallel with a switch, preferably a PFET P1, between P0 and Vcc. A clamp, preferably a PFET P2 with its gate wired to its source, is placed in parallel with a switch, preferably an NFET N2, between N0 and ground. The switches are enabled during power-up, thereby providing quick turn-on of the oscillator. They are then disabled, thereby reducing the voltage across the crystal XTAL and consequently reducing the power consumed.

Low power crystal oscillator

A circuit for detecting a system reset caused by the turning on of power supply of an electronic system. The circuit comprises: latch means coupled to said power supply having a SET input and an output, said output of said latch means being reset to a first predetermined state during power-on; feedback means for receiving said output from said latch means and said system reset, said feedback means activating its output when both of said first predetermined state from said latch means' output and said system reset are present; delay means coupled to the output from said feedback means and to said latch means, said delay means activating its output a predetermined time after said delay means receiving an activated output from said feedback means, said activated output from said delay means setting said latch means to a second predetermined state such that said feedback means remains de-activated when only said system reset is present without power-on.

Supply sensing power-on reset circuit

An oscillator circuit provides a symmetrical signal without halving the frequency of a crystal oscillator 12. The input 14 of the crystal oscillator 12 is low pass filtered, and the output 18 of the filter 16 is differential voltage compared with the input 14 of the crystal oscillator 12. The output 22 of the differential voltage comparator 20 is symmetrical and of the same frequency as the crystal oscillator 12. The crystal oscillator 12 is preferably a Pierce oscillator.

Symmetrical clock crystal oscillator circuit

An ESD protection circuit for the pads of an integrated circuit (IC) using silicide-clad diffusions is disclosed. The circuit uses a robust N+ diode with N-well block, an output NFET and a large transient clamp, each with a distributed, integrated N-well drain resistor to prevent the IC from avalanching and leakage during the Human Body Model and Charged Device Model tests for ESD.

ESD protection for submicron CMOS circuits

A circuit for use on an integrated circuit chip for detecting the operative connection of a crystal used to control an on-chip crystal controlled oscillator, which generates a cyclical clock signal, by detecting the presence or absence, respectively, of the cyclical clock signal and for providing an output control signal in response thereto to an on-chip terminal pad control circuit which automatically enables an on-chip terminal pad to be utilized as a clock signal output terminal pad if the cyclical clock signal presence is detected or as a clock signal input terminal pad otherwise. Also, a method of automatically switching the function of a terminal pad on an integrated circuit chip to function as a clock signal output terminal pad or as a clock signal input terminal pad in accordance with detecting the existence or non-existence of a cyclical clock signal generated on-chip.

Growing community of inventors

Brea, CA, United States of America

Rajiv Gupta