International Business Machines Corporation

Rajesh Bikhubhai Patel

Soummya Mallick

Michael Putrino

Romesh Mangho Jessani

A processor and method for out-of-order execution of instructions are disclosed which fetch a first and a second instruction, wherein the first instruction precedes the second instruction in a program order. A determination is made whether execution of the second instruction is subject to execution of the first instruction. In response to a determination that execution of the second instruction is subject to execution of the first instruction, the second instruction is selectively executed prior to the first instruction in response to a parameter of at least one of the first and second instructions. In one embodiment, the parameter is an execution latency parameter of the first and second instructions.

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Austin, TX, United States of America

Rajesh Bikhubhai Patel