International Business Machines Corporation

Lenovo (singapore) Pte. Ltd.

Rajendra D Panda

Robert H Bell, Jr

Donald R DeSota

Luigi Brochard

Venkat Rajeev Indukuru

Francois Thomas

Sameh Sherif Sharkawi

Joseph H Robichaux

Steven Paul Hartman

John Paul Marino

Deepak Mohan Advani

Robert Spencer Welch

Steven Robert Hansell

Dennis George Weinel

Michael Justin Byron

Ko-Yang Wang

James Andrew Pierce

Donald R Desota

Todd Ming Chun Li

Todd Ming Li

According to one aspect of the present disclosure a method and technique for managing memory access is disclosed. The method includes setting a memory databus utilization threshold for each of a plurality of processors of a data processing system to maintain memory databus utilization of the data processing system at or below a system threshold. The method also includes monitoring memory databus utilization for the plurality of processors and, in response to determining that memory databus utilization for at least one of the processors is below its threshold, reallocating at least a portion of unused databus utilization from the at least one processor to at least one of the other processors.

Reallocating unused memory databus utilization to another processor when utilization is below a threshold

A method, system, and computer program product for processing an application in a high performance computing (HPC) data center are described. The method includes analyzing and sorting a plurality of nodes in a cluster of the HPC data center into a plurality of frequency bins, each of the plurality of nodes being sorted into more than one of the plurality of frequency bins based on performance. The method also includes analyzing and sorting the application into an application bin among a plurality of application bins based on a frequency scaling characteristic of the application. The method further includes selecting a first set of nodes among the plurality of nodes to process the application, the first set of nodes being sorted into a first frequency bin among the plurality of frequency bins corresponding with the application bin of the application.

Performance-aware job scheduling under power constraints

A performance projection system includes a test IHS and a currently existing IHS. The performance projection system includes surrogate programs and user application software. The test IHS employs a memory that includes a virtual future IHS, currently existing IHS, surrogate programs, and user application software for determination of runtime and HW counter performance data. The user application software and surrogate programs execute on the currently existing MS to provide designers with runtime data and HW counter or microarchitecture dependent data. Designers execute surrogate programs on the future IHS to provide runtime and HW counter data. Designers normalize and weight the runtime and HW counter data to provide a representative surrogate program for comparison to user application software performance on the future IHS. Using a scaling factor, designers may generate a projection of runtime performance for the user application software executing on the future IHS.

Workload performance projection for future information handling systems using microarchitecture dependent data

A job scheduler can select a processor core operating frequency for a node in a cluster to perform a job based on energy usage and performance data. After a job request is received, an energy aware job scheduler accesses data that specifies energy usage and job performance metrics that correspond to the requested job and a plurality of processor core operating frequencies. A first of the plurality of processor core operating frequencies is selected that satisfies an energy usage criterion for performing the job based, at least in part, on the data that specifies energy usage and job performance metrics that correspond to the job. The job is assigned to be performed by a node in the cluster at the selected first of the plurality of processor core operating frequencies.

Energy-aware job scheduling for cluster environments

According to one aspect of the present disclosure a system and computer program product for managing memory access is disclosed. The system includes a plurality of memory controllers each configured to maintain memory databus utilization by a corresponding processor at or below a threshold to maintain memory databus utilization of the system at or below a system threshold. The system also includes a service processor configured to receive memory databus utilization data from the memory controllers and programmed to, in response to determining that memory databus utilization for at least one of the processors is below its threshold, reallocate at least a portion of unused databus utilization from the at least one processor to at least one of the other processors.

Memory databus utilization management system and computer program product

A performance projection system includes a test IHS and multiple currently existing IHSs. The performance projection system includes user application software and surrogate programs that execute on currently existing IHSs. The performance projection system measures user application software and surrogate program performance during execution on currently existing IHSs. The performance projection systems measures runtime program performance during execution of surrogate programs on a future semiconductor die IC design model or virtualized future system. Designers normalize and compare surrogate program runtime performance data with user application software performance data. Designers un-normalize the normalized runtime performance data to generate a projection of runtime performance on the future system.

Workload performance projection via surrogate program analysis for future information handling systems

The projected power consumption for an application program running on a future IHS is determined by generating a power proxy for the application program, and power proxies for a plurality of standard benchmarks. An algorithm correlates the power proxy for the application program, and the power proxies for the standard benchmarks to generate weighted surrogates that are combined with power proxies derived from running the benchmark surrogates on the future IHS to generate the projected power consumption.

Workload power consumption projection on information handling system

A visualization tool for creating graphic displays of trace data produced by a parallel computer program execution monitoring system. The visualization tool contains a display monitor, possible input devices, a mass storage device, and a computer system. Trace data is converted into data structures and later pixel maps to ultimately generate processing activity diagrams for each processor in the computer system. If more than one processor is present, more than one processing activity diagram can be generated and simultaneously displayed on the same screen in form of strip graphs and for certain indicated time intervals. An average processor utilization diagram is then calculated and plotted on every processor activity diagram for comparison purposes. Browsing through these strip graphs all at the same time while comparing them against the average utilization graph will allow a user to easily redistribute workload if necessary and/or locate problem situations.

Growing community of inventors

Austin, TX, United States of America

Rajendra D Panda