Efabless Corporation

Ambiq Micro, Inc.

Efavless Corporation

Rajeev Srivastava

Sherif Eid

Risto Bell

Lucio Lanza

Mohamed K Kassem

Michael S Wishart

Robert Timothy Edwards

John M Hughes

Greg P Shaurette

Bertrand Irissou

Yousof Mortazavi

Ivan Bogue

Jesse Coulon

A system comprises a microcontroller system comprising a CPU, an I/O module, and a microcontroller system power input, a power supply comprising a first power supply output providing power at a first power level, and a second power supply output providing power at a second power level, and a switch comprising a signal input communicatively coupled to the I/O module and configured to receive a status signal from the I/O module, a first switch power input electrically coupled to the first power supply output, a second switch power input electrically coupled to the second power supply output, and a switch power output electrically coupled to the microcontroller system power input and configured to output power to the microcontroller system.

System for providing power to low power systems

Systems and methods for generating an integrated circuit (IC) chip design are described. One of the methods includes receiving, on a data sheet, by a server, electrical parameters of a system on chip (SoC) to be designed. The method further includes receiving physical parameters of the SoC on the data sheet, generating a first design of the SoC according to the electrical parameters and the physical parameters, and receiving test parameters for testing the first design. The method further includes testing, via a design verification tool, the first design by applying the test parameters to the first design, receiving a second design of a second SoC, and coupling the second design to the first design to generate a first IC chip design. The method includes arranging the first IC chip design to be included on a shuttle for fabricating a first IC chip.

Systems and methods for obfuscating a circuit design

Systems and methods for engineering integrated circuit design and development are described. A requester posts a request for an integrated circuit chip design using the systems and methods. Moreover, using design tools of the systems and methods, one or more designers generate one or more designs. The designers use computer software that is provided by the systems and methods to test the one or more designs. Moreover, the designs are independently verified by a design engineering entity or by other designers. The one or more designs are provided to a fab via the systems and methods to fabricate a prototype of an integrated circuit chip. The prototype is tested on a printed circuit board by using a test software, which is provided by the systems and methods.

Methods for engineering integrated circuit design and development

In some embodiments, a system comprises a microcontroller system comprising a CPU, an I/O module, and a microcontroller system power input, a power supply comprising a first power supply output providing power at a first power level, and a second power supply output providing power at a second power level, and a switch comprising a signal input communicatively coupled to the I/O module and configured to receive a status signal from the I/O module, a first switch power input electrically coupled to the first power supply output, a second switch power input electrically coupled to the second power supply output, and a switch power output electrically coupled to the microcontroller system power input and configured to output power to the microcontroller system.

Systems and methods for managing operations for generating a plurality of designs of an integrated circuit chip are described. One of the methods includes receiving a request with a specification of the integrated circuit chip from a requester account, receiving a plurality of requests from a plurality of community member accounts for viewing the specification, and providing access to the specification to the plurality of community member accounts. The method further includes receiving a plurality of instances of the acceptance from the plurality of community member accounts for creating the plurality of designs, providing access to a plurality of resources to the plurality of community member accounts, and receiving a plurality of design files having the plurality of designs from the plurality of community member accounts. The method includes providing access to the plurality of designs to the requester account for approval or disapproval of the plurality of designs.

Systems and methods for obfuscating a circuit design are described. One of the methods includes receiving the circuit design from a user computing device. The circuit design includes a plurality of circuit components. The method further includes obfuscating each of the circuit components by transforming layout features associated with the circuit design into a generic layout feature representation. The generic layout feature representation excludes scaled representations of the layout features. The method also includes generating a visual representation of the obfuscated designs. Each of the obfuscated designs has an input port and an output port. The method further includes enabling placement of the obfuscated designs and routing between the input ports and the output ports of the obfuscated designs. The method includes generating an obfuscated integrated circuit design having a master input port, a master output port, the obfuscated designs, and the routing between the obfuscated designs.

Growing community of inventors

Austin, TX, United States of America

Rajeev Srivastava