Sony United Kingdom Limited

Sony Corporation

Rajan Bhandari

Clive Henry Gillard

Michael John Ludgate

Jonathan James Stone

Terence R Hurley

Jonathan M Soloff

James Hedley Wilkinson

Yoshihiro Okamoto

Vincent C Harradine

Howard J Teece

Stephen Charles Olday

Gavin A Walker

Mitsuaki Sugimoto

A buffer (4) has a read and write control (8, 7), an input (6), an output (5), and a transfer port (9). An SCSI interface (20) is coupled to port (9) and the read/write control (8, 7). The SCSI interface (20) implements transfer commands for transfers via the port 9 with an undefined delay. An RS 422 interface is coupled to the read/write control (8) and implements transfer commands for transfers via the input 6 and output 5, the commands being implemented with a small, defined delay synchronously with a video sync signal (SYNC).

Data transfer device operable with two types of interfaces

A data compression apparatus is described which applies a dynamically variable degree of quantisation Q.sub.s to input data so as to control blocks of output data to have a predetermined maximum size. The dynamic control can be carried out on an inter-block basis or an intra-block basis. An overflow detector is provided for inserting an overflow indicator within blocks of compressed data to indicate when overflow has occurred.

Data compression

A serial data coding system is described in which a state machine (FIG. 5) is provided having a plurality of branching hierarchies N, N+1 of states each corresponding to a different decoding table. Depending upon each received bit of serial data, the state machine moves through these branching hierarchies of states until states 88 corresponding to valid codes are reached whereupon a valid code is decoded and the state machine reset to the start of that branching hierarchy. If it is desired to move between branching hierarchies, then an internal table selecting word is inserted into the stream of serial data to move the state machine into a table incrementing state 90 where a jump to another branching hierarchy of states may be made. In order to cope with an externally applied switching signal Y/C for switching the state machine between branching hierarchies, the state machine is first moved into one of a plurality of transfer states A, C, D etc. These states are chosen to be distinct from all other states of the state machine within any branching hierarchies so there is no ambiguity as to which state should be adopted after receipt of the externally applied switching signal Y/C.

State machine apparatus and methods for encoding data in serial form and

A storage mechanism utilizing a single data recorder from which multiple channels of compressed video data may be simultaneously accessed. The data access to and from the data recorder via a single data access path takes place at a higher data rate (f.sub.1, f.sub.2) than the data rate (f.sub.3, f.sub.4) at which that compressed data needs to be decoded to support a video signal. A video router is used to direct the reproduced data stored within two data channel buffers to respective JPEG decoders where they are decompressed into a signal suitable for driving two digital monitors. In operation, a segment of compressed video data for one channel is recovered from the data recorder and stored within one of the buffers from which it is continuously read at a lower data rate (f.sub.3, f.sub.4). The data recorder then cues to another part of the medium from which data for the second channel is reproduced and stored within another buffer. The process is then repeated.

Multichannel video data storage including buffers for reading data at

A digital video tape recording/playback system having a plurality of recording heads (A, B, C, D) on a rotating head mechanism 94 for recording slanting tracks 108 which extend diagonally across a tape 82 provides processing of video signals in a plurality of data processing channels with selective connection of the data processing channels to the recording heads such that data from a plurality of data processing channels are stored in respective portions of a slanting track (A+/A-; B+/B-; C+/C-; D+/D-). The data in each data processing channel and recorded in each track portion is sampled with a substantially even distribution over a field of video signals to provide for effective concealment of recording/playback errors. Preferably, two data processing channels are recorded on each track, the respective portions being located in upper and lower portions of the tape, respectively.

Digital signal recording and/or reproducing apparatus that evenly

A serial data decoding system is described in which a state machine (FIG. 5) is provided having a plurality of branching hierarchies of states, each branching hierarchy of states corresponding to a different decoding table. The state machine incorporates a memory 72 storing control data words (FIG. 7). A latch 74 stores the most recent control data word to be output from the memory. The memory 72 is addressed with a read address formed from a concatenation of the latched value 84, a table selecting word 86, Y/C and a received bit of serial data. When the state machine enters a state 88 corresponding to valid code, the current control data word is output as an identifier of that valid code.

Serial data decoding using state machine with selectable decoding tables

A serial data decoder is described for decoding interleaved variable length and fixed length codes. The decoder includes a state machine which moves between a branching hierarchy of states in dependence upon the bits of received serial data. When the state machine reaches a state corresponding to a complete variable length code having been received, it then enters a delay state lasting for the length of time necessary to receive the following fixed length code prior to return to a reset state. The state machine can be implemented using a static ram 10 storing data including pointers for controlling the movements between states.

Serial data decoder

A serial data decoder is described employing a bank of parallel primary Huffman decoders 70 each operating to decode a stream of variable length code words with embedded control code words into a stream of fixed length index values. The fixed length index values are fed to a secondary decoder which operates under control of the fixed length index values representing control code words to decode the fixed length index values representing the variable length code words into output data.

Serial data decoding for variable length code words

A data decoder is described for decoding interleaved first type code words [RUNLENGTH, SIZE] and second type code words [AMPLITUDE], each first type code word serving to define a runlength of constant values preceding a variable value defined by a following second type code word. The first type code words and the second type code words are fed to respective first and second pipeline delay units 22 and 24. The output from the first pipeline delay unit 22 is fed to a state machine 26 which reads the RUNLENGTH value and generates an INSERT ZEROS signal for a period proportional to the RUNLENGTH value followed by a signal triggering reading of the second pipeline delay unit 24. The INSERT ZEROS signal and the output of the second pipeline delay unit 24 are fed to a multiplexer 28 which selects between them to generate the appropriate OUTPUT signal. A swing buffer 10 is disposed upstream of the first and second pipeline delay units 22 and 24. The second pipeline delay unit 24 is also used to effect fixed length code decoding.

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Basingstoke, United Kingdom

Rajan Bhandari