Advanced Micro Devices Corporation

Ati Technologies Ulc

Rajagopalan Venkatramani

Renato Dimatula Gaddi

Liane Martinez

Dennis Glenn Lozanta Surell

Warren Alexander Santos

The disclosed computer-implemented method can include defining, by at least one processor, one or more boundary conditions. The method can additionally include importing, by the at least one processor, one or more tiles outlines that at least define importing, by the at least one processor, one or more tiles outlines that at least define a cell hierarchy for one or more chiplets. The method can also include defining, by the at least one processor and based at least in part on the one or more tiles outlines, one or more cells of the one or more chiplets at least in part by automatically filling one or more slave cells of the one or more chiplet with a same bump pattern as a master cell of the one or more chiplets. The method can further include generating, by the at least one processor and based at least in part on the defined boundary conditions and the defined one or more cells, a floorplan and bump placement for a package design. Various other methods, systems, and computer-readable media are also disclosed.

Systems and methods for generating a floorplan and bump placement for a package design

A system and method for automatically generating placement of vias within redistribution layers of a semiconductor package are described. In various implementations, a user defines attributes to use for automatic via generation in redistribution layers of a semiconductor package. The circuitry of a processor of a computing device used by the user executes instructions of an automatic redistribution layer (RDL) via generator. The automatic via generator uses the attributes, data indicative of the RDL netlist of signal routes within the RDL, and RDL mask layout data representing the signal masks of the metal layers within the RDL. The processor generates placement of vias for in the RDL based on the attributes and an identification of overlapping regions between metal layers.

Growing community of inventors

Hsinchu, Taiwan

Rajagopalan Venkatramani