National University of Singapore

Rajagopalan Ramaswamy

Hyunsoo Yang

Yi Wang

Shuyuan Shi

Jongmin Lee

In one embodiment, a SOT device is provided that replaces a traditional NM layer adjacent to a magnetic layer with a NM layer that is compatible with CMOS technology. The NM layer may include a CMOS-compatible composite (e.g., CuPt) alloy, a TI (e.g., BiSe, BiSe, BiSb, etc.) or a TI/non-magnetic metal (e.g., BiSe/Ag, BiSe/Ag, BiSb/Ag, etc.) interface, that provides efficient spin current generation. Spin current may be generated in various manners, including extrinsic SHE, TSS or Rashba effect.

Spin orbit materials for efficient spin current generation

In example embodiments, a SOT magnetic memory and operation method are provided that utilize SOT driven domain wall motion to achieve subsequent switching without the need for an external assist magnetic field. The magnetic memory includes a magnetic tunnel junction having a reference layer, a tunnel barrier layer and a free layer, where the tunnel barrier layer is positioned between the reference layer and free layer. A spin-orbit torque layer is disposed adjacent to the free layer. A pair of pinning site are positioned at a longitudinal end of the free layer and each has an opposite magnetization direction from the other. The SOT layer is configured to exert SOT and switch a magnetization direction of the free layer via domain wall motion in a direction of current flow when an electric current is passed through a length of the SOT layer.

Growing community of inventors

Singapore, Singapore

Rajagopalan Ramaswamy