Texas Instruments Corporation

Rajagopal Sundararaman

Simon Edward Willard

Michael J McNutt

Geert Deveirman

Jay Standiford

An on-chip fuse circuit. The circuit includes a fuse capable of being blown during a programming operation, as well as output logic for determining whether the fuse is blown. A protection circuit is provided for protecting the output logic during programming. An evaluation circuit is provided, for evaluating whether the fuse is blown. The evaluation circuit includes a first current source coupled to the fuse, providing a first predetermined current so as to activate the output logic to read out the condition of the fuse during normal operation, as well as a second current source coupled to the fuse, providing a second predetermined current, substantially less than the first predetermined current, so as to activate the output logic to read out the condition of the fuse during an evaluation mode such that a blown condition is indicated by the output logic only if the resistance of the fuse is substantially greater than that required for the output logic to indicate a blown condition during normal operation. According to another aspect of the invention there is provided an on-chip fuse circuit including a first fuse and a second fuse, both being capable of being blown during a programming operation. Output logic is provided for determining whether the fuse is blown, the output logic including first indication logic for indicating whether both of the fuses are blown, during an evaluation mode, and second indication logic for indicating a blown state of the fuse circuit if either of the fuses is blown. A protection circuit is provided for protecting the output logic during programming. An evaluation circuit is provided for evaluating whether the fuse is blown.

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Fullerton, CA, United States of America

Rajagopal Sundararaman