Dell Products Inc.

Force10 Networks, Inc.

Raja Sathianarayan Jayakumar

Krishnamurthy Subramanian

Anoop Ghanwani

Senthil Kumar Ganesan

Raja Subbiah

Aravind Babu Mahendrababu

Ashok Daparthi

Pathangi Narasimhan Janardhanan

Shivakumar Sundaram

Janardhanan P Narasimhan

Sudhir Vittal Shetty

Mohnish Anumala

Kannan Karuppiah

Padmanabhan Narayanan

Per Henrik Fremrot

Claudio Desanti

Jason Lee

Pathangi Narasimhan Janadhanan

Mohnish Anamula

Chetput L Venkataraghavan

A headroom-based result determination system includes first and second ports connected via a link, and a buffer for the first port. A headroom-based result determination subsystem monitors data stored in the buffer that was received in data packets each having a worst-case data packet size and transmitted at a maximum packet rate for a link speed of the link, determines that a buffer threshold is reached and, in response, generates a pause instruction. The headroom-based result determination subsystem then transmits the pause instruction to the second port, measures a first amount of data stored in the buffer subsequent to generating the pause instruction, and generates a headroom-based result by adding the first amount of data, a second amount of data equal to a maximum transmission size of the first port, and a third amount of data equal to a maximum transmission size of a class of the data received at the first port.

Buffer headroom-based result determination system

Embodiments herein provide more efficient, more flexible, and more cost-effective ways to provide additional and/or increased functionality to an information handling system. Presented herein are embodiments of an application acceleration port interface module (which embodiments may be referred to herein for convenience as 'AAPIM') into which pluggable I/O (input/output) modules may be inserted and the other ends inserted into ports of an information handling system to provide the information handling system with increase capabilities (e.g., increased resource, such as added processing, and increased services, such as new applications or accelerated services). AAPIM embodiments are versatile solutions to address application acceleration needs that can be quickly reprogrammed to address specific needs of a user.

Application acceleration port interface module embodiments

A hash collision mitigation system includes a source device coupled to a destination device by a networking device. The networking device receives a first packet from the source device, and uses first packet information included in the first packet to perform a hash operation on the first packet and generate a hash value. The networking device then determines that the hash value has caused a hash collision with a first hash value forwarding entry in a hash forwarding table in the networking device and, in response, generates a first Policy Based Routing (PBR) entry for the first packet. The first PBR entry is configured to provide for the forwarding of at least one second packet received from the destination device and directed to the source device, and that first PBR is stored in a Ternary Content Addressable Memory (TCAM) in the networking device.

Hash collision mitigation system

A microburst visibility system includes a switch device coupled to each sender device(s) and receiver device(s). The switch device receives flows transmitted by the sender device(s) to the receiver device(s). For each flow that include data packets that are stored in a first queue, the switch device provides a first queue identifier for the first queue in a flow record associated with that flow and modifies, for each data packet that is transmitted as part of that flow, flow information in data packet counter(s) that are associated with the first queue identifier in the flow record associated with that flow. When the switch device detects a microburst in the first queue, it captures the flow information in each data packet counter that is associated with the first queue identifier in each of the flow records included in the switch device, and provides it for analysis.

Microburst visibility system

An extended bridge structure that includes a controlling bridge and port extenders is disclosed. A port extender according to some embodiments of the present invention includes a processor that processes receives packets in a way that executes at least one procedure that substitutes for a function of the controlling bridge. A controlling bridge according to the present invention provides data to the port extender that enables it to execute the at least one procedure that substitutes for a function of the controlling bridge.

Port extender

A system and method of automated Data Center Bridging (DCB) configuration of an access switch includes a control unit, a memory, and a port configured to couple the access switch to a peer device. The control unit is configured to operate the port according to a state machine including a DCB disabled state, a DCB downstream state, and a DCB upstream state. When the port is in the DCB disabled state, the control unit exchanges network traffic on the port without any DCB extensions. When the port is in the DCB upstream state, the control unit exchanges network traffic on the port using DCB extensions based on the DCB configuration and receives the DCB configuration from the peer device. When the port is in the DCB downstream state, the control unit exchanges network traffic on the port using the DCB extensions and transmits the DCB configuration to the peer device.

System and method for automated DCB configuration of access switches

Systems and methods are provided that may be employed for automatic access layer configuration, for example, to achieve correct server profile provisioning so as to enable information handling system network connectivity from a server through one or more aggregator switches that is configured to fit a given workload and/or network connectivity architecture. The disclosed systems and methods may be implemented using intelligent platform enablement and exchange of information between information handling system compute resource/s and adjacent access layer switch/es.

Systems and methods for automatic access layer configuration

A stacked chassis comprising multiple physical switch/router chassis operates without any special stacking hardware or stacking channels. Instead, a stacking LAG is installed between front-end switch ports on the stacked chassis. The chassis controllers negotiate a master, which controls operation of all chassis in the stack. A stacked-chassis-wide port numbering scheme is used to distribute information to all line cards in the system. Each line card processes the information to distill physical-chassis significant information for operation of that chassis in the stack.

Packet forwarding using multiple stacked chassis

A packet network device includes a packet network processor memory system for storing information used to process and forward packets of information in and through the network device. The information is included in look-up tables whose entries can be mapped either horizontally or vertically into the memory system. In the event that the entries are mapped horizontally, a complete entry can be access at a single memory location and in the event that the entries are mapped vertically, the entries can be accessed at one or more memory locations.

Growing community of inventors

Fremont, CA, United States of America

Raja Sathianarayan Jayakumar