International Business Machines Corporation

Other

Raj Kumar Singh

Clark Debs Jeffries

Ravinder Kumar Sabhikhi

Ronald Leroy Billau

Ganesh Balakrishnan

Vincenzo V Di Luoffo

Canio Cillis

Kevin David Himberger

George Willard Van Leeuwen

Bruce Oliver Anthony, Jr

Robert W Danford

Philip E Grady

Alan David Boulanger

Larry W Nicholson

John P Chalmers

Jitesh R Nair

Michael Steven Siegel

Michael Raymond Trombley

Everett Arthur Corl, Jr

Laura Ann Weaver

Bryan Keith Bullis

Rama Mohan Yedavalli

Theron Paul Niederer

Foster Beaver White

Garesh Balakrishnan

Mobile network services are performed in a mobile data network in a way that is transparent to most of the existing equipment in the mobile data network. The mobile data network includes a radio access network and a core network. A first service mechanism in the radio access network breaks out data coming from a basestation, and performs one or more mobile network services at the edge of the mobile data network based on the broken out data. These services may include caching of data, data or video compression techniques, push-based services, charging, application serving, analytics, security, data filtering, and new revenue-producing services, as well as others. This architecture allows performing new mobile network services at the edge of a mobile data network within the infrastructure of an existing mobile data network.

Data breakout at the edge of a mobile data network

A flow control method and system including an algorithm for deciding to transmit an arriving packet into a processing queue or to discard it, or, in the case of instructions or packets that must not be discarded, a similar method and system for deciding at a service event to transmit an instruction or packet into a processing queue or to skip the service event. The transmit probability is increased or decreased in consideration of minimum and maximum limits for each flow, aggregate limits for sets of flows, relative priority among flows, queue occupancy, and rate of change of queue occupancy. The effects include protection of flows below their minimum rates, correction of flows above their maximum rates, and, for flows between minimum and maximum rates, reduction of constituent flows of an aggregate that is above its aggregate maximum. Practice of the invention results in low queue occupancy during steady congestion.

Managing traffic within a data communication network

A detection and response system that generates an Alert if unauthorized scanning is detected on a computer network that includes a look-up table to record state value corresponding to the sequence in which SYN, SYN/ACK and RST packets are observed. A set of algorithms executed on a processing engine adjusts the state value in response to observing the packets. When the state value reaches a predetermined value indicating that all three packets have been seen, the algorithm generates an Alert.

Automatically detecting malicious computer network reconnaissance by updating state codes in a histogram

A process control method and system including partitioning transmit decisions and certain measurements into one logical entity (Data Plane) and partitioning algorithm computation to update transmit probabilities into a second logical entity (Control Plane), the two entities periodically communicating fresh measurements from Data Plane to Control Plane and adjusted transmit probabilities from Control Plane to Data Plane. The transmit probability may be used in transmit/discard decisions of packets or instructions exercised at every arrival of a packet or instruction. In an alternative embodiment, the transmit probability may be used in transmit/delay decisions of awaiting instructions or packets exercised at every service event.

System and method for automatic management of many computer data processing system pipes

Method and system for managing traffic within a data communication network

A method and system for providing simulation of an integrated circuit during development of the integrated circuit is disclosed. The integrated circuit has an island that includes an interface. The method and system include a snooper, a checker and a generator. The snooper is coupled with an interface and is for obtaining an output provided by the island during simulation. The checker is coupled with an interface and is for checking the output to determine whether the output is a desired output. The generator is coupled with an interface and is for providing an input to the interface during simulation. The generator is coupled with a test case that directs the generator.

Method and system for providing hierarchical self-checking in ASIC simulation

This system represents a customizable simulation model of an ATM/SONET Framer for System Level Verification and Performance-Characterization. An Asynchronous Transfer Mode (ATM) data processing ASIC interfaces with a Media Access Control (MAC) device that presents an electrical data path interface, called Universal Test & Operations PHY Interface for ATM (UTOPIA), using ATM protocol on the ASIC side and simplex optical interfaces using Synchronous Optical Network (SONET) protocol on the network side. Such a MAC device, commonly referred to as ATM/SONET Framer, provides one Receive and one Transmit interface to the network at various SONET line rates such as 155.52 Mbps (OC-3), 622.08 Mbps (OC-12), 2488.32 Mbps (OC-48), etc. The ATM and the SONET interfaces operate on different clock frequencies and thus represent two distinct clocking domains. The data interchange between the two clocking domains is achieved via FIFO buffer elements and associated control and status signals.

Customizable simulation model of an ATM/SONET framer for system level verification and performance characterization

A system, method and computer program features of the present invention, relate to verification or simulation of a design using a behavioral model structure for use in a Client/Server configuration. A physical part presents the external interface, and a functional procedural part which is comprised of at least one VHDL process. A testcase is a set of procedure calls written in VHDL. The present invention describes the architecture and implementation of a client/server behavioral model and procedural approach for testcase development which results in significant gain in productivity, quality of logic verification, and portability.

Client/server behavioral modeling and testcase development using VHDL for improved logic verification

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Cary, NC, United States of America

Raj Kumar Singh