Motorola Corporation

Semiconductor Components Industries, LLC

Freescale Semiconductor,inc.

Rainer Thoma

Jeffrey Pearse

Yang Du

Hak-Yam Tsoi

Edouard De Fr&eacute;sart

Vida Ilderem Burger

Irenee M Pages

Alain C Duvallet

Carl Kyono

Quang X Nguyen

Suman Kumar Banerjee

Sharanda L Bigelow

Francis K Chai

Cynthia Trigas

A semiconductor device ( ) includes an isolated p-well ( ) formed in a substrate ( ) by a buried n-well ( ) and an n-well ring ( ). The n-well ring ( ) extends from a surface of the semiconductor device ( ) to the buried n-well ( ). The isolated p-well ( ) includes a plurality of n-well plugs ( ) extending from the surface of the semiconductor device ( ) into the isolated p-well ( ) and contacting the buried n-well ( ). The plurality of n-well plugs ( ) reduces an n-well resistance to provide better noise isolation for high frequency signals.

High frequency signal isolation in a semiconductor device

A lateral PNP is disclosed in which a substrate of a first conductivity type is used. On top of the substrate a buried region of a second conductivity type is formed. A lightly doped collector region is located above the buried region. The lateral PNP also includes a base region of a second conductivity type formed by a graded channel implant and a well region of a second conductivity type, the well region contacting the base region, the buried region and a base contact. Additionally, there are collector contacts and emitter contacts of a first conductivity type. The lightly doped collector region results in a large Early voltage and the base region provides for a high current gain.

Lateral PNP and method of manufacture

A vertically diffused FET ( ) is fabricated on a semiconductor die ( ) that includes an N substrate ( ) and an N epitaxial layer ( ). The FET ( ) has a source region ( ) and a channel region ( ) near a front surface ( ) of the epitaxial layer ( ), and a drain region in the substrate ( ). A trench ( ) extends through the epitaxial layer ( ) to the substrate ( ). A conductive layer ( ) fills the trench ( ), thereby forming a conductive plug ( ) electrically coupled to the substrate ( ). The conductive plug ( ) forms a top side drain electrode of the FET ( ).

Semiconductor device and method for fabricating the same

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Gilbert, AZ, United States of America

Rainer Thoma