Intel Corporation

Silicon Image Gmbh

Rainer Theuer

Kyriakos A Stavrou

Lutz Naethke

Bert Bretschneider

Axel Borkowski

Sebastian Winkel

Ethan Schuchman

Tyler N Sondag

Gregor Stellpflug

Nils Hoffmann

Methods and apparatuses relating to assigning a logical thread to a physical thread. In one embodiment, an apparatus includes a data storage device that stores code that when executed by a hardware processor causes the hardware processor to perform the following: translating an instruction into a translated instruction, assigning a logical thread for the translated instruction, and providing a thread map hint for the translated instruction; and a hardware scheduler to assign a physical thread of the hardware processor to execute the logical thread based on the thread map hint.

Apparatuses and methods to assign a logical thread to a physical thread

Method, process, and apparatus to efficiently store, read, and/or process syllables of word data. A portion of a data word, which includes multiple syllables, may be read by a computer processor. The processor may read a first syllable of the data word from a first memory. The processor may read a second syllable of the data word from a second portion of memory. The second syllable may include bits which are less critical than the bits of the first syllable. The second memory may be distinct from the first memory based on one or more physical attributes.

Split-word memory

Method, process, and apparatus to efficiently store, read, and/or process portions of word data. A portion of a data word, which includes multiple portions, may be read by a computer processor. The processor may read a first portion of the data word from a first memory. The processor may read a second portion of the data word from a second portion of memory. The second portion may include bits which are less critical than the bits of the first portion. The second memory may be distinct from the first memory based on one or more physical attributes.

A method of context adaptive binary arithmetic coding (CABAC) of a sequence of data slices permits for quick initialization of context models. The data slices include a plurality of binarized symbols with context individual values having one or more bins of the binarized symbol. The method includes resetting an addressable status register for each new data slice where the status register includes status flag for one of a plurality of available context variable values. Context models are selected for each of a plurality of context individual values and are coded according to a selected context model. A selected context model is updated for an actual context index value based on the previous context index value.

Growing community of inventors

Sehnde, Germany

Rainer Theuer