Intel Corporation

Rahul Joshi

Joydeep Ray

Altug Koker

Aravindh V Anantaraman

Lakshminarayana Pappu

Rahul Pal

Dongsheng Bi

Guadalupe J Garcia

Mahak Gupta

Shrikul Atulkumar Joshi

In a further embodiment, a system on a chip integrated circuit (SoC) is provided that includes an active base die including a first cache memory, a first die mounted on and coupled with the active base die, and a second die mounted on the active base die and coupled with the active base die and the first die. The first die includes an interconnect fabric, an input/output interface, and an atomic operation handler. The second die includes an array of graphics processing elements and an interface to the first cache memory of the active base die. At least one of the graphics processing elements are configured to perform, via the atomic operation handler, an atomic operation to a memory device.

Atomic handling for disaggregated 3D structured SoCs

Growing community of inventors

Pune, India

Rahul Joshi