Intel Corporation

Rahul D Limaye

Simon M Tam

Utpal Desai

Dawson Kesling

Steven J Kirch

Ewunnet Gebre-Selassie

Shah M Musa

Fugao Wang

Dawson W Kesling

A terminal includes control logic to control a phase-locked loop to output a spread-spectrum clocking signal. The control logic controls the generation of the spread-spectrum clocking signal by adjusting at least one parameter of the phase-locked loop. The parameter may be a charge pump setting or a loop-filter capacitance of the phase-locked loop, or their digital equivalents. Adjustment of the parameter reduces a predetermined portion of a communications spectrum. The predetermined portion may be located within a range of frequencies allocated to a specific channel, and reduction of the spectrum in this range may serve to reduce noise associated with clocking harmonics.

Apparatus and method for performing spread-spectrum clock control

A voltage source droop compensated clock modulation for microprocessors is described. Specifically, the circuit reduces the clock frequency if a voltage source droop is detected.

Power supply voltage droop compensated clock modulation for microprocessors

Growing community of inventors

Pleasanton, CA, United States of America

Rahul D Limaye