Intel Corporation

Raghupathy V Giridhar

Glen N Wada

Krishna Kumar Parat

Yudong Kim

Daniel Xu

Cheng C Hu

Anthony Ozzello

A method for making a flash memory having a passivation layer that is not transparent to ultraviolet light. The method forming a semiconductor that includes flash memory cell having floating gate, then forming a the substrate. Process induced charge that has accumulated on the flash cell floating gate is then neutralized and a passivation layer, which is no transparent to ultraviolet light, is formed on the conductive layer.

Flash memory with UV opaque passivation layer

A method of fabricating a flash memory integrated circuit is described. In an embodiment of the present invention a dielectric filled trench isolation region is formed in a silicon substrate. The dielectric filled trench isolation region isolates a first portion of the silicon substrate from a second portion of the silicon substrate. A portion of the dielectric in the trench is then removed to reveal a portion of the silicon substrate in the trench between the first and second portions of the silicon substrate. Ions are then implanted to form a first source region in the first portion of the silicon substrate and to form a second source region in the second portion of the silicon substrate and to form a doped region in the revealed silicon substrate in the trench wherein the doped region in the trench extends from the first doped source region to the second doped source region.

Method of fabrication of a novel flash integrated circuit

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Saratoga, CA, United States of America

Raghupathy V Giridhar