Intel Corporation

Raghavendra Ramesh Rao

Arvind S

Balachandar Santhanam

Alvin Abraham

Arvind Sundaram

Ranjul Balakrishnan

Anbumani Subramanian

Shailendra Singh Chauhan

Jagadish Vasudeva Singh

Arvindh Rajasekaran

Tarakesava Reddy K

Geejagaaru Krishnamurthy Sandesh

Rohit Parakkal

Sandesh Krishnamurthy Geejagaaru

A memory module has pads on the top and bottom surfaces of a module printed circuit board (PCB). The pads match the pin layout of one or more memory devices to be mounted on the memory module. The pads on one surface of the PCB electrically interconnect to the memory device(s), and the pads on the other surface electrically interconnect to pads on a system board, such as a motherboard. With the pad layout on the memory module, the pad layout of the system board can be the same for a memory-down implementation and for a removable memory module. The pad layout provides good signal-to-noise performance and can enable a memory module for low power double data rate (LPDDR) memory, double data rate (DDR) memory, and graphics double data rate (GDDR) memory.

Low profile SODIMM (small outline dual inline memory module)

A power architecture that uses an efficient intermediate power conversion stage between AC adaptor (and battery charger) and subsequent voltage regulators (VRs) (e.g., core VR) for processors for higher overall efficiency allowing for higher performance in a given thermal envelope and iso-system input power. Power losses from both the charger and the core VR are reduced by splitting the power as power to sustained high-power rails, and power to the rest of the platform power rails that have low residency in high-power states. The sustained high-power rails are placed under an intermediate power conversion topology which is directly powered by the adaptor. The rest of the rails along with charging of the battery are powered by the battery charger.

Power delivery architecture for high power portable devices

A printed circuit board (PCB), comprising a first layer, the first layer comprising a first dielectric material substantially exclusively. The PCB also comprises a second layer, the second layer comprising the first dielectric material within a first region and a second dielectric material within a second region adjacent to first region. The first dielectric material has a first dielectric constant, a first coefficient of thermal expansion (CTE) and a first glass transition temperature (Tg). The second dielectric material has a second dielectric constant, a second CTE and a second Tg. The first dielectric constant is greater than the second dielectric constant. The first CTE is substantially equal to the second CTE; and the first Tg and the second Tg are greater than 150° C.

Multi-dielectric printed circuit board

Methods, systems, and storage media for dynamic allocation of communication channels among multiple wireless networks are disclosed. The example embodiments may provide interference mitigation and control among a plurality of wireless protocols operating in an environment. Other embodiments may be disclosed and/or claimed.

Channel allocation among multiple radio frequency networks

Techniques are disclosed for improving perceived eye-contact in video communications on personal communication devices that have a camera positioned offset slightly away from a display screen, such as found in tablets, mobile phones, laptops, desktops ultrabooks, all-in-ones, and the like. A three-dimensional mesh, such as a point cloud, may be created from an image and depth information that is captured of the user. A viewing direction of is determined by assessing the three-dimensional mesh and the mesh is rotated to minimize the angle between the viewing direction and a line of sight between the user's eyes and the camera.

System for enabling eye contact in electronic images

An integrated display panel (IDP) is created by integrating two or more modified component display panels. Each of the two or more modified component display panels include an active region, which may be extended until at least one of the edges. A first set of layers of a first modified component display panel and a second set of layers of the second modified is removed along an edge while manufacturing the first and second modified component display panels. The first and the second modified component display panels are overlapped along the edge to form a junction. At the junction, the back light from a lower layer is allowed to pass through until it reaches a top layer of the IDP. The graphics is displayed, seamlessly, in an active area of the IDP without forming a dark band at the junction of the first and the second modified component display panel.

Growing community of inventors

Bengaluru, India

Raghavendra Ramesh Rao