Hewlett Packard Enterprise Development LP

Hewlett-packard Development Company, L.p.

Other

Raghavan V Venugopal

Patrick A Raymond

Han Wang

Hai Ngoc Nguyen

Chin-Lung Chiang

William C Hallowell

Jyun-Jie Wang

Joseph Foster

Vincent Hung Nguyen

Andrew Potter

Chih-Chiang Chen

Minh H Nguyen

David Paul Mohr

Kevin T Lim

Chanh V Hua

Reza Mushtag Bacchus

Mitchel E Wright

Binh Nguyen

Andrew James Phelan

Michael Stearns

Justin Haanbyull Park

David Kimler Altobelli

Stephen Kay

Ronald A Stone

Stephen M Zaudtke

Vinh T Vuong

Jim W Brainard

Hubert E Brinkmann, Jr

Meng-Chen Wu

Michael Meissner

A test and diagnostics circuit, methods and systems are described. An example test and diagnostics circuit includes a controller and a power monitor coupled to the controller. A load switch on the test and diagnostics circuit selectably implements a load from among multiple load values to test a computing and/or data storage system. The test and diagnostics circuit includes circuitry connecting the controller, the power monitor and the load switch to receive a test enable signal from a non-dedicated pin in a non-volatile dual inline memory module (NV-DIMM) slot to implement a test operation on the system.

Removable test and diagnostics circuit

Example implementations relate to a parallel backup power supply. For example, a parallel backup power supply system can include a plurality of backup power supply cells that support a plurality of loads. Each of the backup power supply cells can include a charging module to charge an associated backup power supply cell among the plurality of backup power supply cells and a cell controller. The cell controller is to can be configured to control the charging module and communicate with a management module. The parallel backup power supply system can also include the management module to activate each of the plurality of backup power supply cells to provide backup power in parallel to the plurality of loads as each of the plurality of backup power supply cells is fully charged.

Parallel backup power supply

Examples herein disclose receiving a communication indicating a number of loads supported by multiple nodes and determining an amount of power available at a backup power source. Based on the determination of the amount of power, the examples disclose delivering power to the multiple nodes from the backup power source.

Communication associated with multiple nodes for delivery of power

Example implementations relate to combined backup power. For example, a system for combined backup power can include a combined backup power supply (CBPS) coupled to a node and a plurality of loads supported by the node. The CBPS can include an uninterruptible power supply (UPS) and a backup power supply coupled to the UPS to act as redundancy for the UPS.

Combined backup power

An example system includes a memory controller; a memory bus coupled to the memory controller; and a dual inline memory module (DIMM) coupled to the memory controller through the memory bus. The DIMM includes a dynamic random access memory (DRAM) portion; a storage portion; and a gate array portion coupled to the memory bus to detect memory access signals and to store information related to the memory access signals on the storage portion.

Memory access signal detection utilizing a tracer DIMM

A Next Generation Form Factor (NGFF) carrier includes a flat component perpendicularly connected to two flat side components to receive an NGFF module, a bar rotatably connected to the two flat side components, and a number of holds along an interior of the flat component to receive a fastener. The NGFF module is insertable in relation to the flat component when the bar is rotated to a first position and fixed on the flat component when the bar is rotated to a second position.

Next generation form factor (NGFF) carrier

Example implementations relate to placing loads in a self-refresh mode using a shared backup power supply. For example, a shared backup power supply system can include a node coupled to a shared backup power supply. The node can include a plurality of loads that include volatile memory and a processing resource to place the plurality of loads in a self-refresh mode in response to a failure of a primary power supply. A shared backup power supply system can also include the shared backup power supply to provide backup power to the plurality of loads in the self-refresh mode in response to the failure of the primary power supply.

Shared backup power self-refresh mode

Examples herein disclose determining when a battery module is below a full charge and selecting a subset of loads based on a prioritization among multiple loads. The selected subset of loads is to receive power from the battery module. The examples herein deliver power to the selected subset of loads.

Load selection for receiving power from a battery module

A technique includes jointly encrypting and error encoding plain text data. The joint encryption and error encoding includes processing plain text data in an encryption cipher comprising a plurality of successive rounds to generate cipher text data; and embedding error correction encoding in the encryption cipher to error correction encode the cipher text data.

Joint encryption and error correction encoding

Processing data in a distributed data storage system generates a sparse check matrix correlating data elements to data syndromes. The system receives notification of a failed node in the distributed data storage system, accesses the sparse check matrix, and determines from the sparse check matrix a correlation between a data element and a syndrome. The system processes a logical operation on the data element and the syndrome and recovers the failed node.

Distributed storage data recovery

A Next Generation Form Factor (NGFF) connector apparatus can include a plurality of upper signal pins and an upper ground (GND) pin that is longer than other upper pins. The NGFF connector apparatus can also include a plurality of lower signal pins and a lower power (PWR) pin that is longer than other lower pins.

Next generation form factor connector

A system and method of increasing digital pathology productivity is provided. The system accepts case information from a plurality of sources and pre-processes that information in order to present the slides in an order and orientation dictated by preference and/or reviewing standard. Upon application of the system and method, the appearance and behavior of the user interface is optimized for the user.

Systems and methods in digital pathology

During runtime of a system, a memory controller is caused to relinquish control of a memory module that includes a volatile memory and a non-volatile memory. After the triggering, an indication is activated to the memory module, the indication causing a backup operation in the memory module, the backup operation being controlled by an internal controller in the memory module, and the backup operation involving a transfer of data from the volatile memory to the non-volatile memory in the memory module.

Runtime backup of data in a memory module

A module is insertable into a cage based on movement along a first axis. The module is to contain an interface card. A mechanism is to move the module along a second axis perpendicular to the first axis, to couple the interface card with the cage.

Modules to contain interface cards

A memory module includes memory banks, a local memory controller to access data in the memory banks, and an interface to an external memory controller that is configured to access the memory module. Multiplexing circuitry selectively connects the memory banks to the local memory controller and to the interface to the external memory controller.

Growing community of inventors

Spring, TX, United States of America

Raghavan V Venugopal