Qualcomm Incorporated

Raghava Rao M V

Kartik Gunvantbhai Desai

This disclosure provides systems, methods, and devices for memory systems that support SRAM fault correction. In a first aspect, a method includes receiving, by a memory controller coupled to a memory module through a first channel and configured to store data in and access data stored in the memory module through the first channel from a host device, data to be stored in a memory of the memory module, determining, by the memory controller, a row in the memory at which the data will be stored, determining, by the memory controller based on the row, an address associated with the row, wherein the address indicates one bit location in the row at which data will not be stored, and storing, by the memory controller, the data at the row in accordance with the address, wherein the data is not stored at the one bit location.

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Bengaluru, India

Raghava Rao M V