Qualcomm Incorporated

Raghav Gupta

Mukund Narasimhan

Rakesh Kumar Sinha

Chulmin Jung

Rahul Sahu

Pradeep Raj

Fahad Ahmed

Po-Hung Chen

Shiba Narayan Mohanty

Burcin Serter Ergun

Ashwith Jerome Rego

A voltage regulator includes a pass transistor coupled between an input and an output of the voltage regulator, and an amplifier having a first input configured to receive a reference voltage, and a second input coupled to the output of the voltage regulator via a feedback path. The voltage regulator also includes a voltage booster coupled between an output of the amplifier and a gate of the pass transistor, and a multiplexer having a first input configured to receive a first clock signal, a second input configured to receive a second clock signal having a higher frequency than the first clock signal, and an output coupled to a clock input of the voltage booster. The voltage regulator also includes a detection circuit having an input coupled to the amplifier, and an output coupled to a select input of the multiplexer.

Fast settled and transient low dropout (LDO) regulator

Systems, methods, and apparatus for writing data into a static random access memory (SRAM) are provided. A write driver circuit includes a bitcell array, a bitline coupled to the bitcell array, and a first driving circuit configured to drive the bitline via a write driver node for writing data into a bitcell for a write operation. The write driver circuit also includes a pre-charging circuit configured to control or to operate with the write driver circuit to drive the write driver node to a high voltage level or a low voltage level for the write operation, and pre-charge the write driver node to the high voltage level, and float the write driver node for a bit-masking operation.

Robust write driver scheme for static random access memory compilers

A write driver is provided that includes a first write driver inverter that inverts a data signal to drive a gate of a second write driver transistor. The write driver transistor has a terminal coupled to a bit line and another terminal coupled to a boost capacitor. A ground for the first write driver inverter floats during a write assist period to choke off leakage of boost charge from the boost capacitor through the write driver transistor.

Write data path to reduce charge leakage of negative boost

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Bengaluru, India

Raghav Gupta