Intel Corporation

Rafi Marom

Zeev Sperber

Robert Valentine

Ofer Levy

Yuval Bustan

In one embodiment, the present invention includes a retirement unit to receive and retire executed instructions. The retirement unit may include a first array to receive information at allocation and a second array to receive information after execution. The retirement unit may further include logic to calculate an event associated with an executed instruction if information associated with the executed instruction is stored in an on-demand portion of at least one of arrays. Other embodiments are described and claimed.

Selectively powered retirement unit using a partitioned allocation array and a partitioned writeback array

Two or more pointers, each of which indicates where values of a respective group of bits of a source of a particular micro-operation will be found when the particular micro-operation is executed, may not all point to the same register. Renaming of the source of the particular micro-operation may be enabled by generating one or more new micro-operations that merge the values into a single register. The one or more new micro-operations are inserted into a sequence of micro-operations that includes the particular micro-operation. Once the source of the particular micro-operation has been renamed, subsequent micro-operations in the sequence may be renamed, if appropriate, and executed, without having to wait for the values to be calculated.

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Haifa, Israel

Rafi Marom