Intel Corporation

Rafi Ben-Tal

David J Harriman

Paul S Diefenbaugh

Mikal Hunsaker

Ilan Pardo

Robert E Gough

Yuval Bachrach

Gideon Prat

Eytan Mann

Richard S Perry

Raanan Sover

Mel Bazes

Assaf Gurevitz

Oren Kaidar

Elad Meir

Ayelet Alon

Junlin Yan

Hagay Barel

Mikal C Hunsaker

An electronic device may include a substrate having a substrate body. The electronic device may include a first interconnect region, for example located proximate to a first end of the substrate. The first interconnect region may extend from the substrate body. The first interconnect region may include a first set of interconnects, and the first set of interconnects may be located proximate to the substrate body. The first interconnect region may include a second set of interconnects, and the second set of interconnects may be located remote from the substrate body. The second set of interconnects may be physically separated from the first set of interconnects, for example by an inactive region. The first set of interconnects may be located between the inactive region and the substrate body.

Electronic device interconnect

Embodiments include apparatuses, systems, and methods associated with modulating a clock signal to encode information. A system may include a plurality of dies including a first die. The first die may include a real time clock (RTC) circuit to receive clock information associated with a shared clock signal that is shared among the plurality of dies, and modulate a RTC signal to encode the clock information. The first die may further include an output terminal coupled to the RTC circuit to pass the modulated RTC signal to one or more other dies of the plurality of dies. A second die of the plurality of dies may include a decoder to receive the modulated RTC signal and extract the clock information. The second die may adjust and/or condition the shared clock signal based on the received clock information. Other embodiments may be described and claimed.

Data transfer by modulating clock signal

For example, a wireless communication receiver may be configured to switch one or more RF components of the receiver between an on-state and an off-state based on at least one detection criterion for preamble detection of a frame preamble by a preamble detector of the receiver, switching the one or more RF components between the on-state and the off-state including switching the one or more RF components from the on-state to the off-state based on determination that the at least one detection criterion is not met, and switching the one or more RF components from the off-state to the on-state after an off-state period, wherein a duration of the off-state period is based at least on a preamble duration of the frame preamble; and to repeat switching the one or more RF components between the on-state and the off-state until the frame preamble is detected by the preamble detector.

Apparatus, system and method of a wireless communication receiver

A method and apparatus to reduce the idle link power in a platform. In one embodiment of the invention, the host and its coupled endpoint(s) in the platform each has a low power idle link state that allows disabling of the high speed link circuitry in both the host and its coupled endpoint(s). This allows the platform to reduce its idle power as both the host and its coupled endpoint(s) are able to turn off their high speed link circuitry in one embodiment of the invention.

Method and apparatus to reduce idle link power in a platform

Certain embodiments herein relate to optimizing power consumption associated with processing group addressed messages. For example, a station may receive a group addressed message (e.g., a broadcast or multicast message) from the access point. An expected time at which such group addressed messages may be received may be determined such that the group addressed messages may be processed without processing beacon frames, thereby consuming less battery power, and as a result, optimizing power consumption at wireless stations.

Systems and methods for optimizing power consumption associated with processing group addressed messages

A system on a chip (SoC) is provided including processing cores and a root complex. The transaction requests are communicated between a root port of the root complex and a device, the root port including electrical idle (EI) exit detect circuitry and a reference clock source. The root port supports a first link state, in which the reference clock source and EI exit detect circuitry of the root port are disabled but a common mode voltage is maintained, and a second link state, in which the reference clock source and EI exit detect circuitry are disabled and the common mode voltage is not maintained. The root port transitions to the first link state based on a service latency requirement of the device being less than a threshold and to the second link state based on the service latency requirement being greater than or equal to the threshold.

Apparatus to reduce idle link power in a platform

An adaptive equalizer is implemented using digital feedback control and using jitter as the adjustment criteria. An adjustable transfer function is implemented to equalize an input signal to enhance the frequency response of the associated system. Jitter is determined for the filtered signal, and the frequency response of the transfer function is varied accordingly by applying a digital adjustment signal to the transfer function structure (for example, a lead-lag filter). The adaptive equalizer can thereby adapt to various transmission medium lengths and signal degradation levels.

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Yokneam, Israel

Rafi Ben-Tal