Intel Corporation

Radoslaw Drabinski

Subramaniam M Maiyuran

Carsten Benthin

Sven Woop

Jorge F Garcia Pabon

Joshua Barczak

Raghavendra Miyar

Pawel Majewski

Holger Gruen

Tomasz Bujewski

Rajarshi Bajpayee

Apparatus and method for accelerating bounding box merge operations. For example, one embodiment of an apparatus comprises: ray tracing acceleration hardware to be used to determine ray traversal results when traversing a ray through a bounding volume hierarchy (BVH), the BVH comprising a plurality of axis-aligned bounding boxes (AABBs); and a bounding box (BB) merge accelerator coupled to one or more execution units and coupled to a local memory in which to store a group of the AABBs, the BB merge accelerator, in response to the one or more EUs, to determine a second AABB to merge with a first AABB in accordance with a specified distance function.

Apparatus and method for accelerating BVH builds by merging bounding boxes

Apparatus and method for camera-aware BVH re-braiding. For example, one embodiment of an apparatus comprises: ray tracing acceleration hardware to be used to determine ray traversal results when traversing a ray through a bounding volume hierarchy (BVH); and BVH processing hardware logic to modify the BVH to reduce spatial overlap between one or more BVH subtrees based on a detected camera position to produce a modified BVH.

Apparatus and method for acceleration data structure re-braiding with camera position

An embodiment of a semiconductor package apparatus may include technology to determine one or more conditions for a set of primitives, and perform primitive replication at a vertex shader based on the determined one or more conditions for the set of primitives. Other embodiments are disclosed and claimed.

Vertex shader with primitive replication

Growing community of inventors

Gdansk, Poland

Radoslaw Drabinski