Qualcomm Incorporated

Radhika Vinayak Guttal

Satyanarayana Sahu

Renukprasad Hiremath

Xiangdong Chen

Venugopal Boynapalli

Hyeokjin Lim

Seid Hadi Rasouli

Venkatasubramanian Narayanan

Mukul Gupta

Dorav Kumar

Chih-lung Kao

Bala Krishna Thalla

Sivakumar Paturi

Hananel Kang

Hyeokjin Bruce Lim

Renukprasad Shreedhar Hiremath

Hybrid diffusion standard library cells, and related systems and methods are disclosed. The hybrid diffusion standard library cells may be fabricated with reduced costs because masks corresponding to fixed base layers remain constant across integrated circuit (IC) devices. In one aspect, a hybrid diffusion standard library cell is provided. The hybrid diffusion standard library cell employs multiple diffusion regions, wherein a break region separates at least two of the multiple diffusion regions. The hybrid diffusion standard library cell includes one or more MEOL interconnects at fixed locations that are configured to connect transistors to a first metal layer. The hybrid diffusion standard library cell includes at least one transistor. Including the break region between multiple diffusion regions helps to limit the locations of the fixed MEOL interconnects, which limits possible locations for base level transistors and fixes the base layer design.

Hybrid diffusion standard library cells, and related systems and methods

A MOS device may include a first logic component with a first input located on a second track and a first output located on the third track. The MOS device may include a second logic component with a second input located on the fourth track and a second output located on a fifth track. For example, the MOS device includes a first interconnect on a Mlayer that is coupled to the first input on the second track. In another example, the MOS device includes a second interconnect on the Mlayer that is coupled to the first output on the third track. The MOS device includes a third interconnect on a Mlayer that is coupled to the second input on the fourth track. Still further, the MOS device includes a fourth interconnect on the Mlayer that is coupled to the second output on the fifth track.

Standard cell architecture for reduced parasitic resistance and improved datapath speed

A MOS device includes a first MOS transistor having a first MOS transistor source, a first MOS transistor drain, and a first MOS transistor gate. The MOS device also includes a second MOS transistor having a second MOS transistor source, a second MOS transistor drain, and a second MOS transistor gate. The second MOS transistor source and the first MOS transistor source are coupled to a first voltage source. The MOS device includes a third MOS transistor having a third MOS transistor gate, the third MOS transistor gate between the first MOS transistor source and the third MOS transistor source, the third MOS transistor further having a third MOS transistor source and a third MOS transistor drain, the third MOS transistor source being coupled to the first MOS transistor source, the third MOS transistor drain being coupled to the second MOS transistor source, the third MOS transistor gate floating.

Source separated cell

A MOS device for reducing an antenna effect is provided. The MOS device includes a diode including a first nMOS transistor having a first nMOS transistor source, a first nMOS transistor drain, a first nMOS transistor gate, and an nMOS transistor body. The nMOS transistor body is coupled to a first voltage source and is an anode of the diode. The first nMOS transistor source, the first nMOS transistor drain, and the first nMOS transistor gate are coupled together and are a cathode of the diode. The MOS device further includes an interconnect extending between a driver output and a load input. The interconnect is coupled to the cathode of the diode. The interconnect may extend on one metal layer only between the driver output and the load input.

Circuit and layout for a high density antenna protection diode

Growing community of inventors

San Diego, CA, United States of America

Radhika Vinayak Guttal