Novellus Systems Incorporated

Lam Research Corporation

Raashina Humayun

Michal Danek

Anand Chandrashekar

Juwen Gao

Deqi Wang

Esther Jeng

Feng Chen

Hanna Bamnolker

Kaihan Abidi Ashtiani

Chiukin Steven Lai

Vishal Gauri

Patrick A Van Cleemput

Jeong-Seok Na

Joshua Collins

Sean C Chang

Shruti Vivek Thombare

Aaron R Fellis

Michael S Barnes

Chi-I Lang

Judy H Huang

Sunil Shanker

Lawrence Schloss

Nerissa Sue Draeger

Patrick Christopher Joyce

Jianing Sun

Gary William Ray

Adrianne K Tipton

Richard S Hill

Willibrordus Gerardus Maria Van Den Hoek

Xiaolan Ba

Karl B Levy

Krishnan Shrinivasan

Feng Wang

Lana Hiului Chan

Souvik Banerjee

Gorun Butail

Ilanit Fisher

Griffin John Kennedy

Abhishek Manohar

Raihan Tarafdar

Yan Guan

Mirko Glass

Anil Mane

Tomas Sadilek

Hyeong Seop Shin

Bart Jan Van Schravendijk

George Matamis

Wai-Fan Yau

Girish Anant Dixit

Samantha SiamHwa Tan

Roey Shaviv

Victor Y Lu

Shih-Ked Lee

Yang Pan

Sanjay Gopinath

Ronald Allan Powell

Akhil N Singhal

Yongsik Yu

Joydeep Guha

Tsung-Han Yang

Brian Lu

Dennis W Hess

Hua Xiang

Michelle T Schulberg

Karthik Subramanian Colinjivadi

Lakshminarayana Nittala

Do Young Kim

Satyanarayana Myneni

Michael Danek

Megha Rathod

Sudha Manandhar

Anand Chadrashekar

Anna Battaglia

Stefano Rassiga

Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some embodiments, the methods involve selective inhibition along a feature profile. Methods of selectively inhibiting tungsten nucleation can include exposing the feature to a direct or remote plasma. In certain embodiments, the substrate can be biased during selective inhibition. Process parameters including bias power, exposure time, plasma power, process pressure and plasma chemistry can be used to tune the inhibition profile. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) wordlines. The methods may be used for both conformal fill and bottom-up/inside-out fill. Examples of applications include logic and memory contact fill, DRAM buried wordline fill, vertically integrated memory gate/wordline fill, and 3-D integration using through-silicon vias.

Tungsten feature fill with nucleation inhibition

A showerhead includes a plurality of plenums and a plurality of through holes positioned in the plurality of plenums. The plenums are stacked in a sequential order in an axial direction perpendicular to a semiconductor substrate. The plenums extend radially fully across the semiconductor substrate. The plenums are disjoint from each other and are configured to respectively supply a first metal precursor, a second metal precursor, and a reactant via the respective plenums without intermixing the first metal precursor, the second metal precursor, and the reactant in the plenums. The through holes of the respective plenums are arranged in a radial direction, which is perpendicular to the axial direction, in the same sequential order as the sequential order of the plenums. The through holes of the plenums open along a flat surface at a bottom of the showerhead. The flat surface extends radially fully across the bottom of the showerhead.

Systems and methods for homogenous intermixing of precursors in alloy atomic layer deposition

Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some embodiments, the methods involve selective inhibition along a feature profile. Methods of selectively inhibiting tungsten nucleation can include exposing the feature to a direct or remote plasma. Pre-inhibition and post-inhibition treatments are used to modulate the inhibition effect, facilitating feature fill using inhibition across a wide process window. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) wordlines. The methods may be used for both conformal fill and bottom-up/inside-out fill. Examples of applications include logic and memory contact fill, DRAM buried wordline fill, vertically integrated memory gate and wordline fill, and 3-D integration using through-silicon vias.

Feature fill with nucleation inhibition

A method includes arranging a substrate in a processing chamber, and exposing the substrate to a gas mixture including a first metal precursor gas and a second metal precursor gas to deposit a first metal precursor and a second metal precursor onto the substrate at the same time. The method further includes purging the processing chamber, supplying a reactant common to both the first metal precursor and the second metal precursor to form a layer of an alloy on the substrate, and purging the processing chamber.

Various embodiments herein relate to methods, apparatus, and systems for etching a feature in a substrate. Typically the feature is etched in a dielectric-containing stack. The etching process involves cyclically etching the feature and depositing a protective film on sidewalls of the partially etched feature. These stages are repeated until the feature reaches its final depth. The protective film may have a particular composition, for example including at least one of a tungsten carbonitride, a tungsten sulfide, tin, a tin-containing compound, molybdenum, a molybdenum-containing compound, a ruthenium carbonitride, a ruthenium sulfide, an aluminum carbonitride, an aluminum sulfide, zirconium, and a zirconium-containing compound. A number of optional steps may be taken including, for example, doping the mask layer, pre-treating the substrate prior to deposition, removing the protective film from the sidewalls, and oxidizing any remaining protective film.

Metal-containing passivation for high aspect ratio etch

Disclosed are methods of depositing a transition metal such as tungsten on a semiconductor substrate. The method includes providing a gas mixture of diborane with a balance of hydrogen, where the hydrogen serves to stabilize the diborane in the gas mixture. The method further includes delivering the gas mixture to the semiconductor substrate to form a boron layer, where the boron layer serves as a reducing agent layer to convert a metal-containing precursor to metal, such as a tungsten-containing precursor to tungsten. In some implementations, the semiconductor substrate includes a vertical structure, such as a three-dimensional vertical NAND structure, with horizontal features or wordlines having openings in sidewalls of the vertical structure, where the boron layer may be conformally deposited in the horizontal features of the vertical structure.

Metal fill process for three-dimensional vertical NAND wordline

Described herein are methods of filling features with tungsten and related systems and apparatus. The methods include inside-out fill techniques as well as conformal deposition in features. Inside-out fill techniques can include selective deposition on etched tungsten layers in features. Conformal and non-conformal etch techniques can be used according to various implementations. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) word lines. Examples of applications include logic and memory contact fill, DRAM buried word line fill, vertically integrated memory gate/word line fill, and 3-D integration with through-silicon vias (TSVs).

Tungsten feature fill

Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some embodiments, the methods involve selective inhibition along a feature profile. Methods of selectively inhibiting tungsten nucleation can include exposing the feature to a direct or remote plasma. The methods include performing multi-stage inhibition treatments including intervals between stages. One or more of plasma source power, substrate bias power, or treatment gas flow may be reduced or turned off during an interval. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) wordlines. The methods may be used for both conformal fill and bottom-up/inside-out fill. Examples of applications include logic and memory contact fill, DRAM buried wordline fill, vertically integrated memory gate and wordline fill, and 3-D integration using through-silicon vias.

Feature fill with multi-stage nucleation inhibition

Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication. In some implementations, the methods involve providing a tungsten (W)-containing layer on a substrate; and depositing a molybdenum (Mo)-containing layer on the W-containing layer. In some implementations, the methods involve depositing a Mo-containing layer directly on a dielectric or titanium nitride (TiN) substrate without an intervening W-containing layer.

Low resistivity films containing molybdenum

In some embodiments, deposition processes for ruthenium (Ru) feature fill include deposition of a thin, protective Ru film under reducing conditions, followed by a Ru fill step under oxidizing conditions. The presence of protective Ru films formed under oxygen-free conditions or with an oxygen-removing operation can enable Ru fill without oxidation of an underlying adhesion layer or metal feature.

Depositing ruthenium layers in interconnect metallization

Methods of depositing fluorine-free tungsten by sequential CVD pulses, such as by alternately pulsing a fluorine-free tungsten precursor and hydrogen in cycles of temporally separated pulses, are provided. Some methods involve depositing fluorine-free tungsten by sequential CVD without depositing a tungsten nucleation layer. Methods also include depositing tungsten directly on a substrate surface using alternating pulses of a chlorine-containing tungsten precursor and hydrogen without treating the substrate surface. Methods also include depositing a tungsten layer using a reducing agent and fluorine-free tungsten-containing precursor and depositing bulk tungsten in sequential CVD cycles of alternating pulses of hydrogen and a tungsten-containing precursor.

Forming low resistivity fluorine free tungsten film without nucleation

Disclosed herein are methods and related apparatus for formation of multi-component tungsten-containing films including multi-component tungsten-containing films diffusion barriers. According to various embodiments, the methods involve deposition of multi-component tungsten-containing films using tungsten chloride (WCl) precursors and boron (B)-containing, silicon (Si)-containing or germanium (Ge)-containing reducing agents.

Tungsten for wordline applications

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Los Altos, CA, United States of America

Raashina Humayun