Mellanox Technologies, Ltd.

Pmc-sierra Israel Ltd.

Nvidia Corporation

Broadlight Ltd.

Celight, Inc.

Raanan Ivry

Mohammad Shafiul Mobin

Vishnu Balan

Hananel Faig

Rohit Rathi

Dai Dai

Yehouda Meiman

Adam Kaminer

David (Dima) Rochlin

A receiver receives communications over a communication channel, which may distort an incoming communication signal. In order to counter this distortion, the frequency response of the receiver is manipulated by adjusting several parameters. Each parameter controls at least a portion of the frequency response of the receiver. The optimal values for the parameters are determined by modifying an initial set of values for the parameters through one or more stochastic hill climbing operations until a performance metric associated with the receiver reaches a local optimum. The modified values are displaced through one or more mutation operations. The stochastic hill climbing operations may subsequently be performed on the mutated values to generate the final values for the parameters.

Receiver and transmitter adaptation using stochastic gradient hill climbing with genetic mutation

An Integrated Circuit (IC) includes feedback control-loop (FCL) circuitry to generate a delay-compensated output signal responsively to an input reference signal. The FCL circuitry includes a main feedback path, a first subtractor, a delay-compensation feedback path, and a second subtractor. The main feedback path is to generate a main feedback signal responsively to the delay-compensated output signal. The first subtractor is to generate a non-compensated output signal responsively to a difference between the main feedback signal and the input reference signal. The delay-compensation feedback path is to generate a delay-compensation feedback signal responsively to the delay-compensated output signal. The second subtractor is to generate the delay-compensated output signal responsively to a difference between the non-compensated output signal and the delay-compensation feedback signal.

High performance feedback loop with delay compensation

A method for generating a Trellis-Coded Modulation (TCM) scheme for transmitting symbols over a Partial-Response (PR) channel, the method including holding a base TCM scheme including a plurality of states and transitions among the states. Sequences of symbols are produced, and second sequences of symbols are calculated, each second sequence emulating a response of the PR channel to a respective sequence of symbols traversing the PR channel. The TCM scheme is initialized by assigning the sequences to the transitions of the base TCM scheme. One or more transitions are removed so that second sequences corresponding to transitions that were not removed are separated by at least a first distance. One or more additional transitions are further removed from the TCM scheme, so that second sequences corresponding to parallel transitions from a current state to a next state are separated by at least a second distance larger than the first distance.

Generation of trellis-coded modulation schemes

A signal processing method includes receiving a digital signal including a sequence of samples. For each sample among at least some of the samples, a neighbor-based estimate is calculated over (i) one or more samples that precede the sample in the sequence and (ii) one or more samples that succeed the sample in the sequence, and an error value, indicative of a deviation of the neighbor-based estimate from an actual value of the sample, is calculating. An impairment in the digital signal is estimated based on a plurality of error values calculated for a plurality of the samples.

Impairment detector for digital signals

A receiver receives communications over a communication channel, which may distort an incoming communication signal. In order to counter this distortion, the frequency response of the receiver is manipulated by adjusting several frequency response parameters. Each frequency response parameter controls at least a portion of the frequency response of the receiver. The optimal values for the frequency response parameters are determined by modifying an initial set of values for the frequency response parameters through one or more of stochastic hill climbing operations until a performance metric associated with the receiver reaches a local maximum. The modified values are displaced through one or more mutation operations. The stochastic hill climbing operations may subsequently be performed on the mutated values to generate the final values for the frequency response parameters.

A method for providing back-compatibility for rational sampling rate disparities between two circuitries, comprises: a) providing a Phase Locked Loop (PLL) operating at a rate different than that of the Symbols generator, which is coupled to a Digital to Analog Converter (DAC) or an Analog to Digital Converter (ADC); b) providing an interpolation filter coupled to said converter, which filter is adapted to perform sampling rate conversion operations on the samples using zero-stuffing, filtering, and decimation, or the like computation-saving algorithm; and c) obtaining the sampling of the symbols at the required and compatible rate.

Method and apparatus for implementing multirate SerDes systems

Embodiments are disclosed for timing recovery used in conjunction with a phase detector embedded in a receiver of a communication system. An example method includes receiving, via a receiver of a communication system, an input signal. The input signal encodes a plurality of bits in a number of amplitude levels. The method further includes using an analog to digital converter to generate a sampled signal based on the input signal. The method further includes using a first interpolation filter to filter the sampled signal. The method further includes using a second interpolation filter to filter the sampled signal. The method further includes using a first non-linear device to process an output of the first interpolation filter. The method further includes using a second non-linear device to process an output of the second interpolation filter. The method further includes performing a mathematical operation on an output of the first non-linear device with an output of the second non-linear device to generate phase information.

Method and apparatus for a one bit per symbol timing recovery phase detector

The invention related to the system and method for optical communication using light of two polarization states. Polarization distortion loss (PDL) is compensated by implementation of polarization controllers at both the transmitter and receiver sides. The transmitter controller performs a mixing transformation of beam with two polarizations, while the receiver controller performs the same transformation in the opposite direction with exactly same sequence as in the transmitter part. A cross scrambling and a polarization rotation represented by matrix multiplication are examples of such mixing polarization transformations. The averaged PDL induced errors are corrected by the FEC code plus interleavers.

Optical communications with polarization dependent loss compensation

In a communication system in which data is transferred by packets, a ranging method in which a receiver, in a given ranging window, periodically compares received data with expected data to find a match. The periodic comparison includes searching for known preamble and/or delimiter sequences of ranging packets and involves timeouts for each search period. In case a match between the known sequences and received sequences is not found and the respective timeout is exceeded, the search and comparison process is restarted and continues until a global timeout is exceeded.

Robust ranging method

A hybrid balanced code is formed from a low rate (narrow bandwidth) balanced code and a high rate (wide bandwidth) low density code. Data encoded using the hybrid balanced code is transmitted between a first communication network entity and a second communication network entity. The hybrid code enables a system having a hybrid transmitter to transmit either a low rate stream detectable by a low rate receiver or a hybrid stream, from which the low rate data may be detected by a low rate receiver while both the high rate data and the low rate data may be detected by a high rate receiver.

Hybrid balanced coding scheme

Devices and methods for processing signals using a Burst-Mode TIA that meets EPON and GPON specifications are disclosed herein. A signal provided by a power detector is processed with the appropriate gain by using a gain selector which includes a feedback circuit to choose the gain internally, thereby eliminating the need for an external control. Further embodiments of the invention include power detectors featuring a low-pass filter, a peak detector, and/or an envelope detector. Further embodiments of the invention include a Freeze function circuit for maintaining a current gain. Further embodiments of the invention apply appropriate gains when bursts with substantially different power levels are received consecutively, and prevent the gain from being changed during a burst. In this method, a two-pole low-pass filter with an undamped response function is used.

Burst-mode TIA (trans-impedance amplifier)

A system and method for coding technique which achieves a high coding gain with simple, low-price implementation. The system comprises a transmitter for transmitting encoded code words, and a receiver for receiving and decoding the code words, via a network. In one embodiment, a low complexity modified R-S coding process is used to R-S encode smaller-bit words (e.g., 7-bit words, instead of 8-bit words). In a second embodiment, a feed-back block concatenated coding process improves coding gain by utilizing concatenation and an erasure algorithm. In a third embodiment, a feed-back block concatenated coding process is designed for an Ethernet. The decoding processes utilize error-correcting capabilities built in during the three encoding processes described herein.

System and method for encoding and decoding data utilizing modified reed-solomon codes

A limiter-amplifier device usable for burst mode communications. In one variation, the device includes a resistor bypassable via a switch, a capacitor, and a limiter-amplifier in series. In operation, in a first phase, the capacitor is discharged to ground via switches. In a second phase, the resistor is bypassed and the capacitor is charged while between the received signal and ground, via switching. In a third phase, in a fast tracking mode, the resistor is bypassed, and the capacitor is placed in series with the limiter-amplifier via switching, and in a slow tracking mode, the resistor is not bypassed, such that the resistor and capacitor are in series with the limiter-amplifier. In additional variations, the resistor is so placed such that less switching functions are needed to bypass the resistor, and additional resistors are optionally used in series with the switches to avoid exceeding current limitations for the switches.

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Caesarea, Israel

Raanan Ivry