Apple Inc.

Advanced Micro Devices Corporation

Digital Equipment Corporation

Microsoft Technology Licensing, LLC

Globalfoundries Inc.

R Stephen Polzin

Alex A Kipman

Kathryn Stone Perez

Mitchell David Adler

Mark James Finocchio

Kudo Tsunoda

Fabrice L Gautier

James B Keller

Ryan M Geiss

Darren Bennett

Noah M Price

Maurice B Steinman

Patrick Y Law

Gerald Robert Talbot

Timothy R Paaske

Michael J Smith

Conrad Sauerwald

Duane M Takahashi

Michael L H Brouwer

William T Edwards

Rueysen Lin

Dale E Gulick

Stephen G Latta

Mark Douglas Hummel

Larry David Hewitt

Frederick Daniel Weber

Relja Markovic

Gerard Richard Williams

David Gerard Conroy

Richard William Schuckle

Sanjay Dabral

James D Kelly

Richard T Witek

Paul C Miranda

Robert E Ober

Michael Haertel

Shwetal Arvind Patel

Richard W Reeves

Darren Alexander Bennett

Ross Voigt La Fetra

Michael B Evans

Kumar Chinnaswamy

Nicholas A Warchol

Chester W Pawlowski

William Guo

Robert E Willard

David H Titzler

Andrej Kocev

Michael E Flynn

James N Leahy

Richard Heye

Gregory G Snook

Roger G Niles

Brian F Rost

William H Cummins

A system recognizes human beings in their natural environment, without special sensing devices attached to the subjects, uniquely identifies them and tracks them in three dimensional space. The resulting representation is presented directly to applications as a multi-point skeletal model delivered in real-time. The device efficiently tracks humans and their natural movements by understanding the natural mechanics and capabilities of the human muscular-skeletal system. The device also uniquely recognizes individuals in order to allow multiple people to interact with the system via natural movements of their limbs and body as well as voice commands/responses.

Device for identifying and tracking multiple humans over time

An integrated circuit (IC) implements an industry standard-defined peripheral interconnect to connect to another integrated circuit or component in a system. The industry standard specification includes a software interface that is well-defined and implemented by various software in the system, and thus is desirable to retain. However, the physical interconnect in the systems employing the integrated circuit may be short, and thus the elaborate physical layer definition may consume more integrated circuit area and power than is otherwise desirable in the IC. The IC may implement a simpler and more power-efficient physical layer, reducing both power consumption and semiconductor substrate area consumption, in some embodiments.

Physical layer for peripheral interconnect with reduced power and area

An SOC implements a security enclave processor (SEP). The SEP may include a processor and one or more security peripherals. The SEP may be isolated from the rest of the SOC (e.g. one or more central processing units (CPUs) in the SOC, or application processors (APs) in the SOC). Access to the SEP may be strictly controlled by hardware. For example, a mechanism in which the CPUs/APs can only access a mailbox location in the SEP is described. The CPU/AP may write a message to the mailbox, which the SEP may read and respond to. The SEP may include one or more of the following in some embodiments: secure key management using wrapping keys, SEP control of boot and/or power management, and separate trust zones in memory.

Key management using security enclave processor

Security enclave processor boot control

Techniques for managing a set of states associated with a capture device are disclosed herein. The capture device may detect and bind to users, and may provide feedback about whether the capture device is bound to, or detecting a user. Techniques are also disclosed wherein virtual ports may be associated with users bound to a capture device and feedback about the state of virtual ports may be provided.

Binding users to a gesture based system and providing feedback to the users

Trust zone support in system on a chip having security enclave processor

A memory device having a scalable bandwidth I/O data bus includes a semiconductor die having a substrate with a first and a second surface. The substrate includes contact pads arranged in rows across the first surface and across the second surface. The contact pads on one surface may be physically arranged in vertical alignment with a corresponding contact pad on the other surface and may be electrically coupled to the corresponding contact pad using a via. The substrate also includes a metallization layer formed on the second surface. The metallization layer includes external data contact pads each arranged in vertical alignment with a respective contact pad on the second surface. Each row of contact pads may be grouped, and the external contact pads within a group are electrically coupled to an adjacent contact pad on the second surface by effectively logically shifting them to the right one contact pad.

Stacked memory device having a scalable bandwidth interface

Systems and methods for mapping natural input devices to legacy system inputs are disclosed. One example system may include a computing device having an algorithmic preprocessing module configured to receive input data containing a natural user input and to identify the natural user input in the input data. The computing device may further include a gesture module coupled to the algorithmic preprocessing module, the gesture module being configured to associate the natural user input to a gesture in a gesture library. The computing device may also include a mapping module to map the gesture to a legacy controller input, and to send the legacy controller input to a legacy system in response to the natural user input.

Mapping a natural input device to a legacy system

A memory device having a scalable bandwidth I/O data bus includes a semiconductor die having a substrate with a first and a second surface. The substrate includes contact pads arranged in rows across the first surface and across the second surface. The contact pads on one surface may be physically arranged in vertical alignment with a corresponding contact pad on the other surface and may be electrically coupled to the corresponding contact pad using a via. The substrate also includes a metallization layer formed on the second surface. The metallization layer includes external data contact pads each arranged in vertical alignment with a respective contact pad on the second surface. Each row of contact pads may be grouped, and the external contact pads within a group are electrically coupled to an adjacent contact pad on the second surface by effectively logically shifting to them to right one contact pad.

A method and apparatus for implementation of error correction code (ECC) checking in non-ECC-compliant components. The method includes receiving a logical address, wherein the logical address maps to first and second physical addresses of a memory. The first and second physical addresses of the memory correspond to memory locations that store data and a corresponding ECC, respectively. The method further comprises translating the logical address into the first and second physical addresses, accessing the data over a data path, separately accessing the ECC over the same data path, and checking the integrity of the data using the ECC.

ECC implementation in non-ECC components

A portable computer system such as a laptop computer system includes a computing subsystem that includes a processor that may execute instructions that implement application software, and a storage coupled to the processor that may store information. The laptop computer system also includes a wireless subsystem that may communicate with a wireless network. In addition, the wireless subsystem may receive an incoming communication and determine whether a requesting user is an authorized user. The processor may retrieve at least a portion of the information from the storage and send the retrieved information to a destination via email, for example, in response to a request by the requesting user for the information.

Mechanism for remotely accessing a portable computer including wireless communication functionality

Growing community of inventors

San Jose, CA, United States of America

R Stephen Polzin