Semiconductor Manufacturing International (shanghai) Corporation

Semiconductor Manufacturing International (beijing) Corporation

Semiconductor Manufacturing International Corp.

Qun Shao

Zhongshan Hong

Li Jiang

Mingqi Li

Qingling Wang

A method for fabricating a semiconductor device includes providing a semiconductor substrate having a first region and a second region; and forming at least one first dummy gate in the first region and at least one second dummy gate in the second region. Further, the method includes forming a dielectric layer with a top surface leveling with a surface of the first dummy gate on the semiconductor substrate; oxidizing a top portion of the second dummy gate to form a protective layer to prevent over-polishing on the second region; removing the first dummy gate to form a first gate trench; forming a first metal layer to fill the first gate trench and cover the protective layer and the dielectric layer; and removing a portion of the first metal layer higher than the dielectric layer to form a first metal gate in the first gate trench.

Semiconductor devices

Semiconductor devices and fabrication method thereof

A semiconductor device and a manufacturing method therefor is based on the fact that a thinner liner oxide layer on the bottom of the trenches can lead to a higher subsequent deposition rate. After forming trenches and a liner oxide layer and before depositing a filling oxide layer in the trenches, a portion of or all of the thickness of the liner oxide layer on bottom of trenches in an isolation area is removed. Removing some or all of a liner oxide layer on the bottom of trenches in an isolation area can improve the deposition rate for trenches in such that the difference in thickness can be reduced for deposited filling oxide layer between isolation area and dense area.

Semiconductor device and manufacturing method thereof

A polishing method includes: mounting a wafer on a fixed abrasive polishing pad located on a polishing platen; delivering a polishing slurry to the fixed abrasive polishing pad to polish the wafer; and adsorbing abrasive particles generated during the polishing process with an electrode. The electrode has a polarity opposite to a polarity of charges of the abrasive particles. A polishing device includes a polishing platen, a fixed abrasive polishing pad, a slurry pipeline and a polarity changer having an electrode. Therefore, the abrasive particles generated during the polishing process are removed, which prevents the wafer from being scratched, thereby increasing wafer yield and improving efficiency.

Polishing method and polishing device

The invention provides a method for manufacturing a transistor which includes: providing a substrate having a plurality of transistors formed thereon, wherein each transistor includes a gate; forming a stressed layer and a first oxide layer on the transistors and on the substrate successively; forming a sacrificial layer on the first oxide layer; patterning the sacrificial layer to remove a part of the sacrificial layer which covers on the gates of the transistors; forming a second oxide layer on the residual sacrificial layer and on a part of the first oxide layer which is exposed after the part of the sacrificial layer is removed; performing a first planarization process to remove a part of the second oxide layer located on the gates of the transistors; performing a second planarization process to remove the residual second oxide layer; and performing a third planarization process to remove the stressed layer.

Growing community of inventors

Shanghai, China

Qun Shao