Intel Corporation

Quinn W Merrill

Derek T Bachand

Chinna B Prudvi

Paul D Breuder

Brent E Lince

Harish Kumar

A cache coherency method, a data eviction method, and a multi-level cache system are disclosed. A copy of data may take one of five states including a shared state, a lazy state, an invalid state, a modified state, and an exclusive state. Based upon the names of these states, the disclosed methods and systems may be labeled &ldquo;SLIME.&rdquo; The method of cache coherency may include storing a copy of data in a cache and storing state information identifying the copy as being stored in one of the five above-mentioned states. In response to a snoop request related to the data, marking a status field indicative of the state of the data to represent that the data is shared without regard to the data's dirty status. The data eviction method includes storing data in a cache, storing a status field in association with the data, the status field having a first sub-field to indicate whether the data is dirty and a second sub-field to indicate whether the data is shared, when the data is to be evicted from the cache, testing the first sub-field field to determine whether the data is dirty and, if so, writing the data to another cache before evicting the data from the cache. The multi-layer cache system includes first and second caches provided in a layered arrangement with the second cache being in a higher layer than the first cache, each cache including cache entries adapted to store data and status fields associated with the data, the status field representing the state of the data, eviction logic in the first cache adapted to test the status field of a cache entry, and control logic adapted to output the contents of the cache entry to a cache entry in the second cache when the status field indicates that data in the cache entry is dirty.

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Phoenix, AZ, United States of America

Quinn W Merrill