Chengdu Boe Optoelectronics Technology Co., Ltd.

Boe Technology Group Co., Ltd.

Beijing Boe Technology Development Co., Ltd.

Quanyong Gu

Tiaomei Zhang

Ziyang Yu

Wenbo Chen

Ming Hu

Haigang Qing

Zhiliang Jiang

Yunsheng Xiao

Mengqi Wang

Pan Zhao

Zhengkun Li

Tianyi Cheng

Jianpeng Wu

Hong Yi

De Li

Haijun Qiu

Zhongliu Yang

Erjin Zhao

Gukhwan Song

Qingqing Yan

Qing He

Xiangnan Pan

Cong Liu

Miao Wang

Qian Xu

Shilong Wang

Guo Ning Liu

Long Ma

A display substrate, a manufacturing method thereof and a display apparatus are provided. The display substrate includes a display region including N pixel groups in a first direction and a peripheral region; each pixel group includes at least one row of pixel regions; the display substrate includes: first and second reset lines; wherein each row of pixel regions corresponds to one first reset line and one second reset line; (N+M) first shift register units are arranged along the first direction; an output terminal of an ith first shift register unit is connected to a second reset line corresponding to an (i−M)th row of pixel regions; an output terminal of a jth first shift register unit is connected to a first reset line corresponding to a jth row of pixel regions through a signal transmission line; N is an integer greater than 2, M is a preset positive integer, M+1≤i≤N+M, 1≤j≤N, and i and j are both integers; orthographic projections of the signal transmission line and at least one of the first shift register units on the base substrate overlaps with each other.

Display substrate, manufacturing method thereof and display apparatus with shared shift register units

A pixel circuit, a pixel driving method, and a display device. The pixel circuit includes a light-emitting element, a driving circuit, and a data writing circuit; the data writing circuit is electrically connected to a first scanning terminal, a data line and a first terminal of the driving circuit, and is configured to write a data voltage provided by the data line into the first terminal of the driving circuit under control of a first scanning signal provided by the first scanning terminal during a data writing phase included in a refresh frame, and write a reset voltage provided by the data line into the first terminal of the driving circuit under control of the first scanning signal during a reset phase included in a hold frame; the driving circuit is configured to drive the light-emitting element under control of a potential of a control terminal thereof.

Pixel circuit, pixel driving method, and display device

An array substrate is provided. The array substrate includes a plurality of first reset signal lines configured to provide a plurality of first reset signals, a plurality of second reset signal lines configured to provide a plurality of second reset signals, a plurality of third reset signal lines, and a plurality of first connecting lines. A respective first reset signal line is connected to a row of first connecting lines, which in turn are connected to source electrodes of first reset transistors in a row of subpixels, respectively. The plurality of second reset signal lines and the plurality of third reset signal lines form an interconnected reset signal supply network. A respective second reset signal line is connected to one or more of the plurality of third reset signal lines. A respective third reset signal line is connected to one or more of the plurality of second reset signal lines.

Array substrate and display apparatus

An array substrate is provided. The array substrate includes a base substrate, and a plurality of pixel driving circuits configured to drive light emission in a plurality of subpixels. A respective pixel driving circuit includes a driving transistor; a compensation transistor configured to provide a compensation voltage signal to a gate electrode of the driving transistor; the compensation transistor including a source electrode, a drain electrode and a gate electrode; a node connecting line in a first signal line layer; a first pad in a second signal line layer on a side of the first signal line layer away from the base substrate; a voltage line configured to output a constant voltage signal; and a voltage connecting line electrically connecting the first pad with the voltage line. The node connecting line connects the gate electrode of the driving transistor and a drain electrode of the compensation transistor.

A display substrate is disclosed, including a display area and a non-display area. The non-display area has a gate drive circuit including multiple cascaded shift register units. A shift register unit includes an input control circuit and an output circuit. The input control circuit is electrically connected to a clock signal line group, a first power supply line, a second power supply line and an output circuit, the output circuit is electrically connected to the first power supply line and a second power supply line. The input control circuit at least includes an input circuit and a first control circuit. The clock signal line group, the second power supply line, the input control circuit, the output circuit and the first power supply line are arranged sequentially along a first direction. The input circuit is located between the second power supply line and the first control circuit in the first direction.

Display substrate, manufacturing method therefor, and display apparatus

A shift register includes a shift module configured for causing the cascade signal output end to output a cascade signal in response to a signal of the input signal end; an reverse output module configured for causing the reverse signal output end to output a signal reverse to the cascade signal output end in response to a signal of the cascade signal output end; a latch module configured for causing an output end of the latch module to output a control signal of the masking signal end in response to signals of the cascade signal output end and the reverse signal output end of a previous level; and a selection output module configured for providing a signal of the first power supply end or the second power supply end to the driving signal output end in response to a signal of the output end of the latch module.

Shift register, driving method, gate drive circuit and display device

A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit and an output circuit; the driving signal generation circuit generates and outputs the Nth stage of driving signal; the gating circuit controls to write the gating input signal into the first node; the output control circuit performs a NAND operation on the Nth stage of driving signal and the potential of the second terminal of the output control circuit to obtain a first output signal; the output circuit inverts the first output signal to obtain and provide an output driving signal through the output driving terminal; N is a positive integer.

Driving circuit, driving method, driving module and display device

A shift register includes a first control circuit configured to, according to one of a second clock signal and a first voltage signal, control a voltage of a second node under control of a voltage of the first node and the second clock signal; and a holding circuit configured to transmit the first voltage signal to an output signal terminal under control of the voltage of the second node. The first control circuit includes a third transistor and a second capacitor. A control electrode of the third transistor is electrically connected to the first node, a first electrode of the third transistor is electrically connected to the first voltage signal terminal, and a second electrode of the third transistor is electrically connected to a third node. First and second ends of the second capacitor are electrically connected to the second clock signal terminal and the third node, respectively.

Shift register with input circuit, output circuit and potential stabilization circuit, method of driving the same, scan driving circuit and display device

A driving circuit, a driving method, a driving module and a display device are provided. The driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, an output circuit, a voltage control circuit and a third control node control circuit. The third control node control circuit is electrically connected to the first node and the third control node respectively, and is configured to control the potential of the third control node according to the potential of the first node.

A display substrate includes: a base substrate and a plurality of sub-pixels arranged on the base substrate, the sub-pixel include a sub-pixel driving circuit, the sub-pixel driving circuit includes: a first transistor, a driving transistor, and a first conductive connection portion; a first electrode of the first transistor is coupled to a second electrode of the driving transistor, a second electrode of the first transistor and a first end portion of the first conductive connection portion are arranged at different layers, the second electrode of the first transistor and the first end portion of the first conductive connection portion are coupled through a via hole; a second end portion of the first conductive connection portion is coupled to a gate electrode of the driving transistor.

Display substrate and display device

An array substrate is provided. The array substrate includes K number of columns of first pads. A respective first pad is connected to an anode of a light emitting element, a second electrode of a fifth transistor, and a second electrode of a sixth transistor. The K number of columns of first pads include a plurality of first-first pads in (2k-1)-th columns of the K columns and a plurality of second-first pads in (2k)-th columns of the K columns. A respective first-first pad and a respective second-first pad have different average line widths.

A display substrate, and a display apparatus corresponding thereto and a manufacturing method therefor. The display substrate comprises: a display region and a non-display region, wherein the non-display region is provided with a gate driving circuit, which comprises a plurality of cascaded shift register units. Each shift register unit comprises: an input circuit (), a first control circuit (), a second control circuit () and an output circuit (), wherein the first control circuit () is located between the input circuit () and the output circuit () in a first direction, and the first control circuit () is arranged in the first direction; and the second control circuit () is adjacent to the first control circuit () in a second direction; the first direction intersects with the second direction.

Display substrate and manufacturing method therefor, and display apparatus

A shift register includes: an input circuit configured to transmit an input signal received at an input signal terminal to a first node under control of a first clock signal transmitted by a first clock signal terminal; an output circuit configured to transmit a second clock signal received at a second clock signal terminal to an output signal terminal under control of a voltage of the first node; a first control circuit configured to, according to one of the second clock signal and a first voltage signal transmitted by a first voltage signal terminal, control a voltage of a second node under control of the voltage of the first node and the second clock signal; and a holding circuit configured to transmit the first voltage signal to the output signal terminal under control of the voltage of the second node.

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Beijing, China

Quanyong Gu