Parade Technologies, Ltd.

Shanghai Jiaotong University

Shanghai Benemae Pharmaceutical Corporation

Quan Yu

Ming Qu

Kochung Lee

Yueh-Lin Yang

Yuntao Zhu

Yuanping Chen

Jian Li

Lei Xie

Denis Ellis

Zhengyu Yuan

Jun Zhao

Haijun Chen

Ning Zhao

Roel Coppoolse

Ross Martin Fosler

Wenyi Wang

Tatao Hsu

Jonathan Huang

Fang Ji

Yiming Yang

Zhiqiang Huang

Xiaogang Pan

Guohua Tang

Fengting Chu

Qiping Feng

John Liuzhong Xu

Quing Ou-yang

You Ben Yin

Ta-Tao Hsu

Zhiqiang Du

Qingling You

Chenjie Yang

Xiaowu Liu

Bing Fang

Wenxuan Shi

Lunguo Xia

Lingjun Yuan

Peijun Lu

Zheng Hu

Rongjing Chen

Disclosed is a force applying device for orthodontic treatment being elastically expandable and configured to generate a restoring force as an orthodontic force for an orthodontic treatment when compressed. The force applying device comprises a first element and a second element capable of moving relative to each other along a first axis. The force applying device for orthodontic treatment is compressed when the first and second elements move towards each other along the first axis. A first arm extends laterally from a first end of the first element away from the second element. A first connecting part of a first connector is fitted over the first arm. A second connecting part of the first connector is to be fitted over a button fixed on a first jaw to connect the first element to the first jaw. Both the first and the second connecting parts are toroidal in shape.

Force applying device for orthodontic treatment

An electronic device has a display substrate including a display area, a driver area, and a fan-out area. The fan-out area is divided to a plurality of fan-out regions, and has interconnects configured to access display elements formed on the display area. The driver area is adjacent to the fan-out area and configured to receive a driver chip having a plurality of pads. The interconnects of the fan-out area include a subset of first interconnects. Each first interconnect passes a first fan-out region and a second fan-out region to access a respective display element. A first portion of the subset of first interconnects is formed on the first fan-out region with a first interconnect pitch, and a second portion of the subset of first interconnects is formed on the second fan-out region with a second interconnect pitch different from the first interconnect pitch.

Variable pitch fan-out routing for display panels having narrow borders

Disclosed are antibodies thereof that bind to coagulation factor XI (FXI) and/or its activated form factor XIa (FXIa), or to fragments of FXI and/or FXIa, and compositions containing the antibodies. Also disclosed are methods of preparing the antibodies and use of the antibodies for treating and/or preventing coagulation associated conditions such as thrombosis and complications or conditions associated with thrombosis.

Anti-coagulation factor XI antibody

An electronic device has a display screen and a driver chip disposed on a driver area of the display screen. A fan-out area of the display screen has interconnects configured to provide electrical accesses to display elements of the display area. The driver chip includes a first edge, a second edge, and a row of electronic pads proximate to the first edge. The electronic pads have a first subset of end pads at a first end of the first row, a second subset of end pads at a second opposite end of the first row, and a subset of intermediate pads located between the first subset and second subset of end pads. The first subset of end pads physically contact a first subset of interconnects from the first edge, and the subset of intermediate pads physically contact a second subset of interconnects from the one or more second edges.

Pad arrangement in fan-out areas of display devices

This application is directed to intra-panel communication in a touch display device in which a touch-integrated timing controller (TTCON) is coupled to touch-embedded source drivers (TSDs) via a plurality of forward links and a set of backward links. The forward links include a first subset of display forward links and a second subset of touch forward links. The TSDs are electrically coupled to a display panel including a plurality of display pixels and a plurality of touch sensors. The TTCON sends a display drive signal including display content data and display control data over the display forward links, and sends a touch control signal including an instruction to initiate an operation mode over the touch forward links. Upon receiving the touch control signal, the TSDs identify the instruction to initiate the operation mode, generate touch data accordingly, and return the touch data to the TTCON via the backward links.

Intra-panel interface for concurrent display driving and touch sensing in touchscreen displays

A system and method are disclosed to utilize Gray code in order to reduce the power consumption of column drivers in a display system. Binary source data is received from a timing controller. A Gray code digitizer converts and encodes the binary source data into a binary portion of data and a Gray code data. The binary portion data and the Gray code data are transmitted through a shift register to a digital-to-analog converter. The shift register consumes less power processing the converted binary portion of data and Gray code data than the corresponding binary source data. The digital-to-analog converter decodes the Gray code and generates corresponding gamma voltage levels for display use.

Utilizing gray code to reduce power consumption in display system

A system and method are disclosed for performing on die jitter tolerance testing. A set of clocks are generated based on an input signal. The set of clocks include in an in-phase signal based on the data switching edge of the input signal. Additionally, the set of clocks include an inverted clock phase shifted by 180 degrees, and a pair of clocks phase shifted positively and negatively by a certain number of degrees, &#x3b8;. Data input is sampled based on the inverted clock and the two phase shifted clocks. The eye opening of the input signal can be determined based on whether each of the inverted clock and the two phase shifted clocks sample the correct data from the input signal at various &#x3b8; values.

On die jitter tolerance test

A system and method are disclosed for generating a high accuracy and low power on die reference clock. An LC clock is generated on die and a frequency divider lowers the LC clock frequency to a target reference frequency. An RCO clock is generated on die with an unknown initial frequency. The RCO clock and target reference clock are compared to determine in which direction the frequency of the RCO clock should be adjusted to move closer to the target reference frequency. A signal is sent causing a current source or capacitor in the RCO circuit to be modified. Therefore, the RCO clock frequency is adjusted. The RCO circuit is repeatedly adjusted until the RCO clock frequency is sufficiently accurate. The LC clock is disabled to conserve the power that would have been consumed in generating the LC clock.

On die low power high accuracy reference clock generation

A circuit for calibrating a resistance value on an integrated circuit includes a resistor network, a reference voltage generator, a comparator, a servo loop, and a shift register. The resistor network includes a plurality of resistor and switch pairs in parallel. The resistor network further includes a servo resistor in series with a servo resistor switch such that the servo resistor and servo resistor switch are in parallel with the plurality of resistor and switch pairs. The servo loop generates a shift register gating signal and includes a current sample register for storing a current comparator output data value and a previous sample register for storing a previous comparator output data value. The shift register, upon receipt of a shift register gating signal at a first state, inputs the current comparator output data value to shift data bits through the shift register.

On-chip resistor calibration for line termination

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Shanghai, China

Quan Yu