Chinese Academy of Sciences

Guangzhou Artificial Intelligence and Advanced Computing Institute of Casia

Guangdong Institute of Artificial Intelligence and Advanced Computing

Qiuxiang Fan

Jun Liang

Jie Hao

Yafang Song

Lin Shu

Hui Feng

Liangtian Zhao

Wenqing Hu

Zhifeng Lv

Meiting Zhao

The field of high-speed data acquisition and network data processing, and particularly relates to an Ethernet data stream recording method, an Ethernet data stream recording system, and an Ethernet data stream recording device for a high-speed data acquisition system. It is intended to solve problems such as a low utilization rate of CPU, poor system compatibility, difficulty in packaging and deployment and low reliability of system transmission of the traditional high-speed data acquisition system. The method of the present disclosure includes: isolating a preset number of CPU cores after a Linux operating system is booted; uninstalling a kernel network card driver of the operating system and creating a hugepage memory pool; for each 10-gigabit network card, allocating a corresponding data-receiving buffer pool and a corresponding lock-free FIFO buffer, and initializing a PCIE register of each 10-gigabit network card such that each 10-gigabit network card enters into an acquisition state; and continuously receiving packets acquired by each 10-gigabit network card in a driving manner of user space polling and performing disk recording. According to the present disclosure, the utilization rate of CPU, system compatibility and transmission reliability are improved and the difficulty in packaging and deployment is decreased.

Ethernet data stream recording method and system for high-speed data acquisition system

A method and device for implementing an FPGA-based large-scale radio frequency interference array correlator are provided. The method includes: obtaining the number of channels of data of a radio frequency interference array, and performing average division; calculating the total correlation of data group and the total correlation between the data group and other data groups respectively through corresponding correlation calculation modules, and performing an accumulation calculation in an integration period to complete the total correlation operation of the radio frequency interference array. By means of grouping division and time division multiplexing, the FPGA resource is effectively utilized, and the calculation process of FPGA is simplified. The new method is suitable for the operation process of the system with high parallelism and high real-time requirements, and provides a high-efficiency solution for the real-time calculation of massive data of the large-scale radio frequency interference array.

Method and device for implementing an FPGA-based large-scale radio frequency interference array correlator

A digital receiving apparatus includes an analog-to-digital conversion module, a polyphase filter module, a fast Fourier transform module and a phase compensation module, which transforms signals of a target radio source from time domain to frequency domain. It further includes a standard time acquisition module configured to acquire a standard timestamp, a communication module configured to communicate with a host computer, a delay parameter temporary storage module configured to store a to-be-compensated delay parameter, a control enable module configured to generate an enable signal, a delay module configured to perform delay, and a phase parameter generation module configured to temporarily store the to-be-compensated delay parameter and convert it into a phase compensation parameter. The present invention achieves precise synchronous system startup, and the to-be-compensated parameter is updated and aligned in real time to compensate for a time-varying delay difference to accurately track with precision and observe the target radio source.

Digital receiving apparatus, system, and method for tracking and observing target radio source

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Beijing, China

Qiuxiang Fan