Huawei Technologies Co., Limited

Shanghai Hua Hong Nec Electronics Company, Limited

Shanghai Huahong Grace Semiconductor Manufacturing Corporation

Shenzhen Yinwang Intelligent Technologies Co., Ltd.

Qing Su

Tao Ma

Ying Jin

Yu Liu

Hu Liu

Xiaofei Wang

Wenshuai Yin

Ke Wan

Yue Gu

Xiancheng Guo

Junyuan Yang

Wenxiao Hu

Mingyang Dai

This application provides a method for training a neural network model and an apparatus. The method includes: obtaining annotation data that is of a service and that is generated by a terminal device in a specified period; training a second neural network model by using the annotation data that is of the service and that is generated in the specified period, to obtain a trained second neural network model; and updating a first neural network model based on the trained second neural network model. In the method, training is performed based on the annotation data generated by the terminal device, so that in an updated first neural network model compared with a universal model, an inference result has a higher confidence level, and a personalized requirement of a user can be better met.

Method for training neural network model and apparatus

A model file management method includes that a terminal device receives a storage address of a target model file package from a server and the terminal device obtains the target model file package based on the storage address of the target model file package, where the target model file package is based on a parameter of a model file package locally stored in the terminal device and a parameter of a model file package managed by the server. In an artificial intelligence (AI) field, an application may implement a specific function by using an AI model file. An application is decoupled from an AI model file such that the terminal device performs centralized management on a general model file.

Model file management method and terminal device

Technical effects of a method, an apparatus, and a system for operating a shared resource in an asynchronous multiprocessing system that are provided in the present invention are as follows: A processor in an asynchronous multiprocessing system implements an operation on a shared resource by locking a hardware resource lock, and the hardware resource lock is implemented by a register; in this way, a bus in the asynchronous multiprocessing system does not need to support a synchronization operation, and the processor also does not need to have a feature of supporting a synchronization operation, and is capable of implementing the operation on the shared resource only in a manner of accessing the register, which simplifies the operation on the shared resource by the processor in the asynchronous multiprocessing system, enlarges a selection range of the processor in the asynchronous multiprocessing system, and further improves flexibility of the asynchronous multiprocessing system.

Method, apparatus, and system for operating shared resource in asynchronous multiprocessing system

The present invention discloses an electrostatic protective device structure, which comprises a CMOS transistor that is disposed entirely above a P-type silicon substrate and arranged into a multi-finger-pattern structure, wherein on the outermost side on both sides of this electrostatic protective device structure is the source region of the MOS transistor, an active region of other drain region or source region in addition to the outermost source region on both sides is arranged in comb teeth pattern and in pairwise intersection, between the active regions of the adjacent drain region or source region is a field oxide region isolation, and on the drain region or source region is disposed a contact hole connecting metal with the active region, wherein the contact hole on the comb-tooth-pattern and pairwise intersected active region is located at the top of the comb-tooth-pattern active region, i.e. close to a side of the field oxide region isolation far away from the polysilicon gate. The present invention, mainly applied to electrostatic protection of a low-voltage MOS, is capable of not only improving its electrostatic protection capability effectively but also minimizing the occupied area of the protective device, and able to be used as both an electrostatic protective device and a power device.

Electrostatic protective device

A bond pad structure for an integrated circuit chip package is disclosed. The bond pad structure includes a top metal layer, a patterned metal layer and an interconnection structure. The patterned metal layer is formed below the top metal layer and includes an annular metal layer and a plurality of metal blocks evenly arranged at a central area of the annular metal layer; the patterned metal layer is connected to the top metal layer through both the annular metal layer and the metal blocks. The interconnection structure is formed below the patterned metal layer and is connected to patterned metal layer only through the annular metal layer. By using the above structure, active or passive devices can be disposed under the bond pad structure and will not be damaged by package stress. An integrated circuit employing the above bond pad structure is also disclosed.

Bond pad structure

The present invention discloses a high-voltage ESD protection device including a silicon controlled rectifier and a first PNP transistor. The silicon controlled rectifier includes a high-voltage P-well and N-well; a first N+ and P+ diffusion region are formed in the high-voltage P-well; a second N+ and P+ diffusion region are formed in the high-voltage N-well. The first PNP transistor comprises an N-type buried layer; a low-voltage N-well formed in the N-type buried layer; and a base, emitter and collector formed in the low-voltage N-well. The base and emitter are shorted together; the collector is shorted to the second N+ diffusion region and the second P+ diffusion region; the first N+ diffusion region is shorted to the first P+ diffusion region to act as a ground terminal. The high-voltage ESD protection device can effectively adjust the ESD trigger voltage and improve the snapback sustaining voltage after the device is switched on.

Growing community of inventors

Shanghai, China

Qing Su