Integrated Device Technology, Inc.

Tempo Semiconductor, Inc.

Qichang Wu

Juan Qiao

Shuo Liu

Daniel Bogard

Zhuyan Shao

Shun Qian

An audio processing integrated circuit chip, such as codec chip, includes at least one port output circuit configured to generate an audio signal to drive an external audio device and a PC beep circuit configured to receive a PC beep signal and to apply the received PC beep signal to an input of the at least one port output circuit. The chip further includes a control circuit configured to detect activity of the PC beep signal and to enable and/or disable the at least one port output circuit responsive to the detected activity.

Audio processing devices with port output circuits controlled by PC beep signal activity

A novel solution that combines the technologies of fractional divider and phase selection is provided to implement over-clocking for CPU PLL in PC clock generator with a set resolution that is independent of the clock frequency.

Overclocking with phase selection

A method and apparatus for generating a spread spectrum reference clock is presented. A method and apparatus is presented for receiving a spread spectrum parameter from a phase lock loop, wherein the spread spectrum parameter includes a multiple-level parameter comprising a plurality of phase signals; quantizing a spread spectrum profile associated with the spread spectrum parameter; mapping the quantized profile; generating control signals based on the mapping, wherein the control signals include an integer control signal and a phase control signal; dividing a phase signal of the plurality of phase signals with the integer control signal; synchronizing the divided phase signal using the phase control signal; and providing a reference clock for a spread spectrum clock generator based on the synchronizing.

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Shanghai, China

Qichang Wu