Yangtze Memory Technologies Co., Ltd.

Qiangwei Zhang

Bin Yuan

Xiangning Wang

Zongke Xu

Zhu Yang

Jingjing Geng

Chen Zuo

Zhen Guo

Bo Xu

Liming Cheng

A three-dimensional (3D) memory device includes a staircase, a plurality of contacts, a plurality of groups of support structures, and a fourth support structure between adjacent groups of support structures through the staircase. The plurality of groups of support structures are arranged in a first direction. Each of the groups of support structures includes three support structures. Projections of the three support structures form a triangular shape in a plane parallel to the first direction. The plurality of contacts each is surrounded by a respective group. A projection of one of the contacts overlaps with the triangular shape of the respective group.

Three-dimensional memory devices and methods for forming the same

The present disclosure relates to a three-dimensional memory and a method for manufacturing the same. The three-dimensional memory includes a gate stack structure including a core area and a step area which are disposed in juxtaposition and in direct contact in a first direction; a dummy separation structure penetrating through the step area in the first direction; and a gate separation structure penetrating through the core area in the first direction, the gate separation structure having a first end in contact with the dummy separation structure in the first direction, the dummy separation structure having a second end in contact with the gate separation structure in the first direction, and the first end being located within the second end.

Three-dimensional memory and method for manufacturing the same

Aspects of the disclosure provide methods for fabricating semiconductor devices. In some examples, a method for fabricating a semiconductor device includes forming a stack of layers having a first region and a second region. The stack of layers includes at least a first layer. The method then forms a hard mask layer on the stack of layers in the first region. Then, the method includes patterning the stack of layers in the second region of the semiconductor device. The patterning of the stack of layers in the second region removes a portion of the stack of layers in the second region, and exposes a side of the stack of layers. The method further includes covering at least the side of the stack of layers with a second layer that has a lower remove rate than the first layer, and then the method includes removing the hard mask layer.

Semiconductor device fabrication

Aspects of the disclosure provide semiconductor devices. For example, a semiconductor device includes a substrate having a first region and a second region along a first direction that is parallel to a main surface of the substrate. Then, the semiconductor device includes a memory stack that includes a first stack of alternating gate layers and insulating layers and a second stack of alternating gate layers and insulating layers along a second direction that is perpendicular to the main surface of the substrate. Further, the semiconductor device includes a joint insulating layer in the second region and a third stack of alternating gate layers and insulating layers in the first region between the first stack of alternating gate layers and insulating layers and the second stack of alternating gate layers and insulating layers.

Vertical memory devices

A three-dimensional (3D) memory device is provided. In an example, the 3D memory device includes a staircase and a plurality of groups of support structures through the staircase. The plurality of groups of support structures are arranged in a first direction, and each of the groups of support structures comprises three support structures, wherein projections of the three support structures form a triangular shape in a plane parallel to the first direction.

Growing community of inventors

Wuhan, China

Qiangwei Zhang