Rockwell Automation Technologies Incorporated

Qiang Yin

Russel J Kerkman

Richard Lukaszewski

Haihui Lu

Lixiang Wei

Gary Leonard Skibinski

Wei Qian

Dongsheng Zhou

Frederick Louis Hoadley

Naihu Li

Richard A Lukaszewski

A motor drive system is disclosed that includes a power input configured to receive alternating current (AC) power and a rectifier having a switching frequency selected to convert the AC power to direct current (DC) power. The motor drive unit also includes an input filter circuit connected between the power input and the rectifier and configured to suppress frequency harmonics across a range of harmonics. Additionally, the motor drive unit includes a block filter circuit connected between the power input and the rectifier and configured to substantially block frequency harmonics associated with the switching frequency of the rectifier. Furthermore, the motor drive unit includes an inverter configured to receive the DC power from the rectifier and convert the DC power to a series of pulses configured to drive a motor.

System and method for controlling input line harmonics in a motor drive

A method and apparatus for reducing common mode noise in a three phase pulse width modulated (PWM) system, the method comprising the steps of receiving the first, second and third modulating waveforms, identifying one of the modulating waveforms that is at least one of instantaneously the maximum and instantaneously the minimum of the modulating waveforms as a first identified waveform, wherein comparison of the first identified waveform to the carrier signal would generate a first on-off pulse sequence associated with a phase corresponding to the first identified waveform, generating switch control signals associated with the phase corresponding to the first identified waveform that cause a modified on-off pulse sequence that is phase shifted from the first pulse sequence, using the second and third modulating waveforms to generate second and third on-off pulse sequences corresponding to the second and third phases and providing the modified pulse sequence and the second and third pulse sequences to the one of the inverter and the converter.

Common mode noise reduction in converter systems through modification of single phase switching signal

A method and apparatus for reducing common mode noise in a three phase pulse width modulated (PWM) system the method comprising the steps of receiving modulating waveforms, identifying a first of the modulating waveforms that is instantaneously the maximum of the modulating waveforms, identifying a second of the modulating waveforms that is instantaneously the minimum of the modulating waveforms, for a first phase associated with at least one of the first and second identified waveforms, substituting a first substitute waveform for the one of the first and second waveforms, for the first phase, modifying at least one of the first substituted waveform and duty cycle signals generated by comparing the first substituted waveform with the carrier signal as a function of a first rule set to substantially minimize the effects of turn on delays and for at least one of the second and third phases, modifying at least one of the associated modulating waveform and duty cycle signals generated by comparing the modulating waveform with the carrier signal as a function of a second rule set to substantially eliminate the effects of turn on delays where the second rule set is different than the first rule set.

Modulation methods and apparatus for reducing common mode noise

Methods and apparatus for reducing the common mode voltage generated by eliminating zero-voltage vectors in a rectifier/inverter variable frequency drive (VFD) system includes comparing three phase voltages to each other to determine a maximum voltage in one phase, a minimum voltage in another phase and a middle voltage in still another phase, inverting phase voltages for one phase having the maximum voltage and another phase having the minimum voltage, comparing the phase voltages to a carrier wave to determine gating signals for three respective phases of the inverter, and inverting gating signals for the one phase having the maximum voltage and for another phase having the minimum voltage to reduce the common mode voltage in the motor. In one embodiment, the zero-voltage vectors are removed by relating a first plurality of gating signals and a plurality of sector logic signals in a logic table to a second plurality of gating signals that are applied to phases of the inverter

Modulation methods and apparatus for reducing common mode voltages

Methods and apparatus for canceling dead time effects in the form of common mode voltages produced by a three-phase power conversion device in a rectifier/inverter variable frequency drive (VFD) system includes limiting the voltage difference between phase voltages at certain switching transition times to an amount &#x3b4;, that is a function of the dead time that is specified for the switches and delaying gating signals to the switches to remove unexpected pulses produced by common mode voltages.

Cancellation of dead time effects for reducing common mode voltages

An active filter controller for use with both pure and hybrid shunt filters wherein the controller maintains a minimum DC bus voltage required to generate a compensating current on coupling lines and also extrapolates to estimate an expected feedback current to be compensated so that compensation currents are more accurate and harmonic currents are appreciably reduced.

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Shanghai, China

Qiang Yin