Synopsys, Inc.

Qiang Qiang

Dhiraj Goswami

Ngai Ngai William Hung

Jasvinder Singh

In-Ho Moon

Guillermo R Maturana

In Ho Moon

In some aspects, a logic design undergoes functional verification, which includes generating a test stimulus to apply to the logic design. The test stimulus includes test values for variables representing signals in the logic design. Generating the test stimulus involves a first problem of solving for the test values of the variables subject to constraints on the test values. It is solved as follows. A specification of the logic design is accessed. An array implication graph is generated from the specification. The array implication graph represents the problem as a set of two or more single-array constraint problems. Each single-array constraint problem solves for the test values of a single array of the variables subject to the constraints within that single array. The array implication graph also represents dependencies between different single-array constraint problems. The problem is solved based on the dependencies represented in the array implication graph.

Solving multiple array problems interacting with each other in constraint solving for functional verification of logic designs

Techniques and systems for solving a set of constraints are described. Binary decision diagram (BDD) learning can be applied to a proper subset of the first set of constraints to obtain a set of bit-level invariants. The set of bit-level invariants can then be used for solving the set of constraints. The set of bit-level invariants can include (1) forbidden invariants, (2) conditional invariants, and/or (3) bit-level invariants that are determined by applying BDD learning to a conjunction of constraints and range expressions. If multiple implied constraints have a common right-hand-side (RHS) expression, then BDD learning can be applied to the common RHS expression only once.

Bit-level learning for word-level constraint solving

A constraint solver utilizes a modified relaxation process to generate multiple different stimulus stream arrays that comply with multi-dimensional (e.g., 2D or 3D) constraints. First, an array is generated including rows and columns of randomly generated test vector values. During a first revision phase, the array is modified to comply with first-dimension constraints (e.g., selected test vector values are changed in non-compliant rows until every row complies with all row constraints). A second revision phase is then performed in multiple cycles, where each cycle includes identifying a current element having a greatest impact on non-compliance of the array on second-dimension (e.g., column and/or diagonal) constraints, and revising the current element's test vector value in a way that both minimizes the non-compliance, and also maintains compliance of the array with the first-dimension constraints. The second revision phase repeats until the array converges on a solution that complies with all multi-dimensional constraints.

Multi-dimensional constraint solver using modified relaxation process

Methods and apparatuses are described for assigning random values to a set of random variables so that the assigned random values satisfy a set of constraints. A constraint solver can receive a set of constraints that is expected to cause performance problems when the system assigns random values to the set of random variables in a manner that satisfies the set of constraints. For example, modulo constraints and bit-slice constraints can cause the system to perform excessive backtracking when the system attempts to assign random values to the set of random variables in a manner that satisfies the set of constraints. The system can rewrite the set of constraints to obtain a new set of constraints that is expected to reduce and/or avoid the performance problems. The system can then assign random values to the set of random variables based on the new set of constraints.

Optimizing constraint solving by rewriting at least one bit-slice constraint

Optimizing constraint solving by rewriting at least one modulo constraint

Methods and apparatuses are described for assigning random values to a set of random variables so that the assigned random values satisfy a set of constraints. An embodiment can receive a set of constraints, wherein each constraint is defined over one or more random variables from a set of random variables. Next, the embodiment can generate a circuit model based on the set of constraints, wherein assignable values for at least one node in the circuit model are represented in multiple value systems. The embodiment can then assign random values to the set of random variables based on the circuit model.

Performing implication and decision making using multiple value systems during constraint solving

Some embodiments provide a system for adaptively performing state-to-symbolic transformation in a canonical representation which is used for generating random stimulus for a constrained-random simulation. The system can construct a canonical representation for a set of constraints using the set of random variables and the subset of the state variables in the constraints. Next, the system can use the canonical representation to generate random stimulus for the constrained-random simulation, and monitor parameters associated with the constrained-random simulation. Next, the system can add state variables to or remove state variables from the canonical representation based at least on the monitored parameters. The system can then use the modified canonical representation which has a different set of state variables to generate random stimulus for the constrained-random simulation.

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Santa Clara, CA, United States of America

Qiang Qiang