Freescale Semiconductor,inc.

Intel Corporation

Nxp Usa, Inc.

Qiang Li

Olin L Hartin

Lianjun Liu

Melvy Freeland Miller, Iii

Qinghua Li

Jing Zhu

Jonathan K Abrokwah

Chuanzhao Yu

David A Newman

Sergio P Pacheco

Jon T Adams

Alexey Vladimirovich Khoryaev

Xintian Eddie Lin

Xingang Guo

Thuy B Dao

Radu Mircea Secareanu

Fred T Brauchler

Michael J Zunino

Sateh Jalaleddine

An inductance apparatus includes a first winding comprising a first wire section and a second wire section. The first wire section and the second wire section are disposed in a first horizontal plane associated with a center axis, and the first winding is associated with an equivalent current flow path within the first horizontal plane; a second winding extends via the center axis in the first horizontal plane to the first wire section and the second wire section, wherein the equivalent current flow path of the first winding is aligned with a current flow path associated with the second winding.

Chip multi-layer transformer and inductor

A stacked transformer or inductor apparatus including a first layer with a first layer wire element extending around a center axis and a second layer with a second layer wire element. The second layer element includes side by side first and second wire components in parallel spaced relation extending around the center axis and the first wire component is connected to the first layer wire element to form a primary turn winding. A third layer includes a third layer wire element extending around the center axis and connected to the second wire component of the second layer wire element to form a secondary turn winding partially overlapping with the primary turn winding.

On-chip multi-layer transformer and inductor

An embodiment of a transformer-based system or galvanic isolation device includes a first coil, a second coil aligned with the first coil across a gap, and a first capacitor coupled between the first coil and a first voltage reference. A first electrode of the first capacitor may be formed from a conductive electrode structure that is electrically isolated from the first coil, and a second electrode of the first capacitor may be formed from at least a portion of the first coil. The system or device also may include a second capacitor coupled between the second coil and a second voltage reference. The first and second coils may form portions of first and second IC die, respectively, and the system or device may also include one or more dielectric components within the gap between the IC die, where the dielectric component(s) are positioned directly between the first and second coils.

Systems and devices with common mode noise suppression structures and methods

An electronic apparatus includes a semiconductor substrate, a circuit block disposed in and supported by the semiconductor substrate and comprising an inductor, and a discontinuous noise isolation guard ring surrounding the circuit block. The discontinuous noise isolation guard ring includes a metal ring supported by the semiconductor substrate and a ring-shaped region disposed in the semiconductor substrate, having a dopant concentration level, and electrically coupled to the metal ring, to inhibit noise in the semiconductor substrate from reaching the circuit. The metal ring has a first gap and the ring-shaped region has a second gap.

Integrated circuit chip with discontinuous guard ring

Embodiments of antennas and radio frequency (RF) modules include a substrate, a first antenna arm coupled to the substrate, and a first conductive structure between a distal end of the first antenna arm and a bottom surface of the substrate. An embodiment of a system includes a first substrate, a first conductive structure on a top surface of the first substrate, and an antenna coupled to the top surface of the first substrate. The antenna includes a second substrate, a first antenna arm coupled to the second substrate, and a second conductive structure having a proximal end and a distal end. The proximal end of the second conductive structure is coupled to a distal end of the first antenna arm, and the distal end of the second conductive structure extends to a bottom surface of the second substrate and is coupled to the first conductive structure on the first substrate.

Extendable-arm antennas, and modules and systems in which they are incorporated

An embodiment of an antenna includes a radiation frame and a planar inverted-F antenna (PIFA). The radiation frame has a frame shape that defines a central opening. The PIFA includes an antenna arm, a feed arm, and a shorting arm. A distal end of the shorting arm is conductively coupled with the radiation frame. The antenna may be coupled to a substrate of an RF module. The RF module may be included in a system that also includes a non-RF component that produces a signal for transmission. In such a system, the RF module is configured to receive the signal, convert the signal to an RF signal, and radiate the RF signal over an air interface.

Planar inverted-F antennas, and modules and systems in which they are incorporated

A device in a wireless network receives signals and determines media access control (MAC) slot boundaries of the received signals. The MAC slot boundaries are averaged in time, and a local slot boundary is modified in response thereto. The local MAC slot boundary is modified by less than ten percent of a short interframe space until the local MAC slot boundary is within one orthogonal frequency division multiplexing (OFDM) cyclic prefix duration of the averaged MAC slot boundaries.

MAC slot alignment among multiple wireless stations

A toroidal inductor formed in a semiconductor substrate. Through-silicon vias are used to connect metal layers formed on top and bottom surfaces of the semiconductor substrate. In one embodiment, the vias are elongated and laid out in two concentric circles, an inner circle enclosed by an outer circle. The vias of the outer concentric circle are longer than the vias of the inner circle so that spaces between vias are the same for both circles. In another embodiment, each elongated via may include a plurality of circular vias formed in a line. Metals layers on the top and bottom of the semiconductor substrate are patterned to form wedge shaped connectors between the inner and outer vias to form the spirals of the toroidal inductor. The wedge shaped connectors with elongated vias allow spacing between spirals to be constant.

Method for forming a toroidal inductor in a semiconductor substrate

A balanced-unbalanced (balun) signal transformer includes an unbalanced port, a balanced port coupled to the unbalanced port, the balanced port comprising a first terminal and a second terminal, a first capacitor coupled to the first terminal, a first inductor coupled to ground and the first capacitor, a second capacitor coupled to the second terminal, and a second inductor coupled to ground and the second capacitor. The transformer may also include a third capacitor coupled to a terminal of the unbalanced port; and a third inductor coupled to the third capacitor and the third terminal.

Balun signal transformer and method of forming

An adaptive receiver algorithm is disclosed, for use in multiple-input-multiple-output orthogonal frequency division multiplexing systems. The adaptive receiver algorithm selectively chooses either the maximum ratio combining technique or the minimum mean square error technique, for optimum receiver performance, depending on the characteristics of the wireless environment.

Pragmatic adaptive maximum ratio combining (MRC) and minimum mean square error (MMSE) multiple input multiple output-orthogonal frequency division multiplexing (MIMO-OFDM) receiver algorithm

An electronic assembly includes a substrate (), a balun transformer () formed on the substrate () and including a first winding () and a second winding (), each having respective first and second ends, and a reaction circuit component () formed on the substrate () and electrically coupled to the second winding () between the first and second ends thereof. The balun transformer () and the reaction circuit component () jointly form a harmonically suppressed balun transformer having a fundamental frequency, and the reaction circuit component () is tuned such that the harmonically suppressed balun transformer resonates at a selected harmonic of the fundamental frequency.

Balun transformer with improved harmonic suppression

An impedance matching network is integrated on a first die and coupled to a second die, with the first and second dies mounted on a conductive back plate. The impedance matching network comprises a first inductor bridging between the first and second dies, a second inductor coupled to the first inductor and disposed on the first die, and a metal-insulator-metal (MIM) capacitor disposed on the first die. The MIM capacitor has a first metal layer coupled to the second inductor, and a second metal layer grounded to the conductive back plate. A method for manufacturing the integrated impedance matching network comprises the steps of forming an inductor on a die, forming a capacitor on the die, coupling the capacitor to the inductor, coupling the die bottom surface and the capacitor to a conductive plate, and coupling the inductor to another inductor that bridges between the die and another die.

Growing community of inventors

Gilbert, AZ, United States of America

Qiang Li