Globalfoundries Inc.

Qiang Fang

Zhiguo Sun

Jiehui Shu

Haigou Huang

Shafaat Ahmed

Jinping Liu

Huang Liu

Jin Ping Liu

Dinesh R Koli

Changhong Wu

Hui Zang

John H Zhang

Guoxiang Ning

Ravi Prakash Srivastava

Wei-Tsu Tseng

Christian Witt

Yuping Ren

Haifeng Sheng

Stan Tsai

Tai Fong Chao

Xingzhao Shi

Xiaohan Wang

Daniel Fisher

Cheng Xu

A method of fabricating interconnects in a semiconductor device is provided, which includes forming an interconnect layer having a conductive line and depositing a first aluminum-containing layer over the interconnect layer. A dielectric layer is deposited over the first aluminum-containing layer, followed by a second aluminum-containing layer deposited over the dielectric layer. A via opening is formed in the second aluminum-containing layer through to the conductive line, wherein the via opening has chamferless sidewalls.

Chamferless interconnect vias of semiconductor devices

Methods of self-aligned multiple patterning and structures formed by self-aligned multiple patterning. A mandrel line is patterned from a first mandrel layer disposed on a hardmask and a second mandrel layer disposed over the first mandrel layer. A first section of the second mandrel layer of the mandrel line is removed to expose a first section of the first mandrel layer. The first section of the first mandrel layer is masked, and the second sections of the second mandrel layer and the underlying second portions of the first mandrel layer are removed to expose first portions of the hardmask. The first portions of the hardmask are then removed with an etching process to form a trench in the hardmask. A second portion of the hardmask is masked by the first portion of the first mandrel layer during the etching process to form a cut in the trench.

Self-aligned multiple patterning processes with layered mandrels

The present disclosure relates to semiconductor structures and, more particularly, to a cobalt plated via integration scheme and methods of manufacture. The structure includes: a via structure composed of cobalt material; and a wiring structure above the via structure. The wiring structure is lined with a barrier liner and the cobalt material and filled with conductive material.

Cobalt plated via integration scheme

The disclosure relates to a method of forming a Co contact module, the method including depositing a liner layer on a trench block, partially plating the lined trenches with Co as a first metal such that the resulting Co layer has a top surface below an opening top surface of a shallowest trench, depositing a second metal on the Co layer and exposed surfaces of the liner layer, planarizing the second metal layer, and etching the second metal layer and portions of the liner layer. The disclosure also relates to a Co contact module formed by the noted method.

Method of forming cobalt contact module and cobalt contact module formed thereby

A method of forming hybrid Co and Cu CA/CB contacts and the resulting device are provided. Embodiments include forming a forming a plurality of trenches through an ILD down to a substrate; forming a first metal liner on side and bottom surfaces of each trench and over the ILD; annealing the first metal liner; forming a second metal liner over the first metal liner; forming a first plating layer over a portion of the second metal liner in each trench; forming a second plating layer over the second metal liner and first plating layer in a remaining portion of each trench, the first and second plating layers being different materials; and planarizing the second plating layer and the second and first metal liners down to the ILD.

Method to prevent cobalt recess

A process for forming a conductive structure includes the formation of a self-aligned, inlaid conductive cap over a cobalt-based contact. The inlaid conductive cap is formed using a damascene process by depositing a conductive layer comprising tungsten or copper over a recessed cobalt-based contact, followed by a CMP step to remove excess portions of the conductive layer. The conductive cap can cooperate with a liner/barrier layer to form an effective barrier to cobalt migration and oxidation.

Structure and method for inhibiting cobalt diffusion

One illustrative method disclosed herein includes, among other things, forming a plurality of trenches in a layer of insulating material, performing at least one damage-causing process operation to selectively damage portions of the insulating material adjacent the trenches, forming a conductive line in each of the trenches, after forming the conductive lines, performing a selective etching process to selectively remove at least portions of the damaged portions of the insulating material and thereby define an air gap positioned laterally adjacent each of the conductive lines, and forming a capping layer of material above the conductive lines, the air gap and the undamaged portion of the layer of insulating material.

Methods of forming air gaps in metallization layers on integrated circuit products

A starting metallization structure for electrically coupling one or more underlying semiconductor devices, the structure including a bottom layer of dielectric material with metal-filled via(s) situated therein, a protective layer over the bottom layer, and a top layer of dielectric material over the protective layer. A sacrificial layer of amorphous silicon is formed over the top layer of dielectric material, a protective layer is formed over the sacrificial layer and via(s) through each layer above the metal-filled via(s) to expose the metal of the metal-filled via(s). The protective layer is then selectively removed, as well as the sacrificial layer of amorphous silicon.

Sacrificial amorphous silicon hard mask for BEOL

Methods of lithographic patterning and structures formed by lithographic patterning. A hardmask layer is formed on a dielectric layer, a feature is formed on the hardmask layer, and a mandrel is formed that extends in a first direction across the first feature. The mandrel and the hardmask layer beneath the mandrel are removed to pattern the hardmask layer with the feature masking a section of the hardmask layer. After the hardmask layer is patterned, the dielectric layer is etched to form a first trench and a second trench that are separated by a section of the dielectric layer masked by the section of the hardmask layer. The first trench and the second trench are filled with a conductor layer to respectively form a first wire and a second wire that is separated from the first wire by the section of the dielectric layer.

Self-aligned lithographic patterning with variable spacings

Reducing liner corrosion during metallization of semiconductor devices at BEOL includes providing a starting metallization structure, the structure including a bottom layer of dielectric material with a via therein, a liner lining the via and extending over upper edges thereof, the lined via over filled with a conductive material, recessing the conductive material down to the liner, further selectively recessing the conductive material below the upper edges of the via without damaging the liner, and forming a cap of the liner material on the conductive material.

Reducing liner corrosion during metallization of semiconductor devices

A method includes forming a placeholder source/drain contact structure above a semiconductor material. A conformal deposition process is performed to form a liner layer above the placeholder contact structure. A dielectric layer is formed above the liner layer. A first planarization process is performed to remove material of the dielectric layer and expose a first top surface of the liner layer above the placeholder contact structure. A first cap layer is formed above the dielectric layer. A second planarization process is performed to remove material of the first cap layer and the liner layer to expose a second top surface of the placeholder contact structure. The placeholder contact structure is removed to define a source/drain contact recess in the dielectric layer. The sidewalls of the dielectric layer in the source/drain contact recess are covered by the liner layer. A conductive material is formed in the contact recess.

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Ballston Lake, NY, United States of America

Qiang Fang