Chengdu Boe Optoelectronics Technology Co., Ltd.

Boe Technology Group Co., Ltd.

Beijing University of Technology

International Business Machines Corporation

Beijing Boe Technology Development Co., Ltd.

Baidu Online Network Technology (beijing) Co., Ltd.

Beijing Baidu Netcom Science and Technology Co., Ltd.

Beijing Institute of Technology

Qian Xu

Jianpeng Wu

Ming Hu

Chang Luo

Yan Huang

Benlian Wang

Fengli Ji

Peng Xu

Tong Niu

Guomeng Zhang

Zhiliang Jiang

Haijun Qiu

Tianyi Cheng

Cong Liu

Ziyang Yu

Mengqi Wang

Wenbo Chen

Yi Zhang

Wei Zhang

Yuanqi Zhang

Xiao Xi Liu

Erjin Zhao

Sen Du

Shanshan Qian

Ziming Wang

Jialin Li

Xiabing Bai

Jianan Guan

Guanghong Lai

Haifeng Wang

Xin Peng Liu

Hua Wu

Qi Guo

Lei Gao

Zheng Li

Wei Xu

Tiaomei Zhang

Pan Zhao

Tian Wu

Chao Feng

Quanyong Gu

Lun Zhang

Kun Jing

Qingqing Yan

Xiaoyu Yang

Xiao Yin Zhou

Qing He

Zhenni Yan

Xingfei Ge

Xiangnan Pan

Daisong Guan

Ya Ling Xu

Jianbo Li

Sifei Ai

Dachun Liao

Dai Tan

Qi Wei

Ting Jiang

Xiaolei Pan

Wenyu Sun

The present disclosure provides a display substrate and related devices. The display substrate includes a plurality of first sub-pixels, second sub-pixels and third sub-pixels. In a first direction, the first sub-pixels and the third sub-pixels are arranged alternately to form a plurality of first sub-pixel rows, the second sub-pixels form a plurality of second sub-pixel rows, the first sub-pixel rows and the second sub-pixel rows are arranged alternately in a second direction, connection lines of center points of two first sub-pixels and two third sub-pixels form a first virtual quadrilateral, the two first sub-pixels are located at two vertex angles of the first virtual quadrilateral which are opposite to each other, one second sub-pixel is located within the first virtual quadrilateral, and the first virtual quadrilateral includes two interior angles each being equal to 90° and two interior angles each being not equal to 90°.

Display substrate and related devices with improved resolution

Display substrate, display device, high-precision metal mask are provided. Display substrate includes: first, second, and third sub-pixels; in first direction, first and third sub-pixels are alternately arranged to form first sub-pixel rows, second sub-pixels form second sub-pixel rows; in second direction, first and second sub-pixel rows are alternately arranged; two first and two third sub-pixels in two adjacent rows and two adjacent columns form 2*2 array; in the array, two first sub-pixels are in different rows and in different columns, so are the two third sub-pixels, connection lines of centers of two first and two third sub-pixels form virtual quadrilateral, second sub-pixel is within virtual quadrilateral; for multiple distances from centers of two first and two third sub-pixels corresponding to same virtual quadrilateral to center of second sub-pixel, at least two distances are different. Brightness centers of virtual pixels have more uniform distribution.

Display substrate, display device and high-precision metal mask

A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, an output circuit and a voltage control circuit; the driving signal generation circuit generates an Nth stage of driving signal, the output control circuit connects the first control node and the second node under the control of the potential of the first node; the gating circuit controls to write a gating input signal into the first node under the control of a gating control signal; the voltage control circuit controls a potential of the second node according to a potential of the first node; the output circuit connects the output driving terminal and the first voltage terminal under the control of the potential of the second node, and connects the output driving terminal and the second voltage terminal under the control of the potential of the third control node.

Gate driving circuit having a gating circuit, and driving method thereof

A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit and an output circuit; the driving signal generation circuit generates and outputs the Nth stage of driving signal; the gating circuit controls to write the gating input signal into the first node; the output control circuit performs a NAND operation on the Nth stage of driving signal and the potential of the second terminal of the output control circuit to obtain a first output signal; the output circuit inverts the first output signal to obtain and provide an output driving signal through the output driving terminal; N is a positive integer.

Driving circuit, driving method, driving module and display device

A mask includes a frame, at least one mask sheet, and a shielding plate. The frame includes a plurality of borders. The borders are connected end to end in sequence to form the frame with a first hollow region. A mask sheet includes a pattern region and non-pattern regions. The pattern region includes at least one evaporation hole. The shielding plate includes a plurality of shielding strips. The plurality of shielding strips are arranged crosswise to form a plurality of second hollow regions. Orthogonal projections of the second hollow regions on a plane perpendicular to a thickness direction of the frame are located within a range of an orthogonal projection of the first hollow region on the plane. An inner edge of an orthogonal projection of the frame on the plane is located within a range of an orthogonal projection of the shielding plate on the plane.

Mask and manufacturing method therefor

A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, an output circuit, a voltage control circuit and a second node control circuit; the driving signal generation circuit generates an Nth stage of driving signal; the output control circuit controls to connect the first control node and the second node under the control of the potential of the first node; the gating circuit writes a gating input signal into the first node under the control of a gating control signal; the voltage control circuit controls a potential of the second node according to the potential of the first node; the second node control circuit controls to connect the second node and the first voltage terminal under the control of the potential of the first node.

A pixel array includes a plurality of sub-pixels, which include first to third sub-pixels. The first and third sub-pixels are alternately arranged along a row direction and form first pixel rows. The first and third sub-pixels, which are in a same column, in the first pixel rows are alternately arranged, and the second sub-pixels are arranged side by side along the row direction and form second pixel rows. Lines sequentially connecting centers of two of the first sub-pixels and two of the third sub-pixels, which are arranged in an array, together form a first virtual quadrilateral, and one of the second sub-pixels is in each first virtual quadrilateral. A straight line in the row direction or in a column direction, which passes through a center of each sub-pixel of at least one of the plurality of sub-pixels, divides the sub-pixel into two parts having areas different from each other.

Pixel array and display device

The present disclosure provides a driving circuitry, a driving method, a driving module, and a display device. The driving circuitry includes a driving signal generation circuitry, a gating circuitry, an output control circuitry and an output circuitry. The driving signal generation circuitry is configured to perform a shifting operation on an (N−1)-level driving signal to obtain an N-level driving signal. The gating circuitry is configured to write a gating input signal into a first node under the control of a gating control signal. The output control circuitry is configured to perform an NAND operation on the N-level driving signal and a potential at a second end of the output control circuitry to obtain a first output signal. The output circuitry is configured to perform phase inversion on the first output signal to obtain and provide an output driving signal through an output driving end, where N is a positive integer.

Driving circuitry, driving method, driving module, and display device

A mask sheet for evaporation on a substrate is provided, and the mask sheet includes: a plurality of first ribs extending in a first direction; and a plurality of second ribs extending in a second direction intersecting the first direction, the mask sheet includes a first region for an evaporation of a first exposure region of the substrate and a second region for an evaporation of a second exposure region of the substrate, a third rib is provided at a boundary of the first region and the second region so as to shield an overlapping exposure region between the first exposure region and the second exposure region, the third rib includes a first sub-rib, a second sub-rib, and a spacer for separating the first sub-rib and the second sub-rib, and the third rib has a width greater than that of the first rib.

Mask sheet including rib and mask device

A display substrate, a display device, a high-precision metal mask are provided. The display substrate includes first, second, third sub-pixels. In first direction, first and third sub-pixels are alternated to form first sub-pixel rows, second sub-pixels form second sub-pixel rows. In second direction, first and second sub-pixel rows are alternated, first direction is approximately perpendicular to second direction. Two first and two third sub-pixels in two adjacent rows and two adjacent columns form a 2*2 array, in the array, two first sub-pixels are in different rows and different columns, two third sub-pixels are in different rows and different columns, at least one of two first and two third sub-pixels is a pattern where corner is cut off, connection lines of centers of two first and two third sub-pixels form non-square virtual quadrilateral, and second sub-pixel is within virtual quadrilateral. The display effect can be improved.

There is provided a pixel array including a plurality of sub-pixels, which include first sub-pixels, second sub-pixels, and third sub-pixels. The first and the third sub-pixels are alternately arranged along a row direction and form a plurality of first pixel rows, the first and third sub-pixels, which are in a same column, in the plurality of first pixel rows are alternately arranged, and the second sub-pixels are arranged along the row direction and form second pixel rows. Lines sequentially connecting centers of any two of the first sub-pixels and any two of the third sub-pixels, which are arranged in an array, together form a first virtual quadrilateral, and one of the second sub-pixels is in each first virtual quadrilateral. At least one interior angle of the first virtual quadrilateral is not 90°. At least one of the first, second and third sub-pixels has a corner circularly or rectilinearly chamfered.

A method for controlling stretching of a mask includes: obtaining actual position information of at least one opening of the mask; determining an actual offset of each opening according to actual position information of the opening and preset position information of a light-emitting region of a sub-pixel corresponding to the opening; determining whether the actual offset of the opening is less than or equal to a theoretical maximum offset of the opening; and in response to determining that the actual offset of the opening is less than or equal to the theoretical maximum offset of the opening, generating a first end command for ending a process of stretching the mask.

Method and device for controlling stretching of mask, and stretching system

A display substrate and related devices are provided. The display substrate includes a plurality of first sub-pixels, second sub-pixels and third sub-pixels. In a first direction, the first sub-pixels and the third sub-pixels are arranged alternately to form a plurality of first sub-pixel rows, the second sub-pixels form a plurality of second sub-pixel rows, the first sub-pixel rows and the second sub-pixel rows are arranged alternately in a second direction, connection lines of center points of two first sub-pixels and two third sub-pixels form a first virtual quadrilateral, the two first sub-pixels are located at two vertex angles of the first virtual quadrilateral which are opposite to each other, one second sub-pixel is located within the first virtual quadrilateral, and the first virtual quadrilateral includes two interior angles each being equal to 90° and two interior angles each being not equal to 90°.

Display substrate and related devices

There is provided a pixel array including a plurality of sub-pixels, which include first sub-pixels, second sub-pixels, and third sub-pixels. The first and third sub-pixels are alternately arranged along a row direction and form a plurality of first pixel rows, the first and third sub-pixels, which are in a same column, in the plurality of first pixel rows are alternately arranged, and the second sub-pixels are arranged along the row direction and form second pixel rows. Lines sequentially connecting centers of any two of the first sub-pixels and any two of the third sub-pixels, which are arranged in an array, together form a first virtual quadrilateral, and one of the second sub-pixels is in each first virtual quadrilateral. At least one interior angle of the first virtual quadrilateral is not 90&#xb0;. At least one of the first, second and third sub-pixels has a corner circularly or rectilinearly chamfered.

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Beijing, China

Qian Xu