Ansys, Inc.

Clk Design Automation, Inc.

Qian Shen

Joao Moreno Geada

Scott Johnson

Sankar Ramachandran

Anusha Gummana

Nicholas Lee Rethman

Murat R Becer

Lee La France

Robert Geada

According to one aspect of this disclosure, time domain information can be associated with switching probabilities and propagated through a simulated circuit during a static timing analysis to provide finer grain details for use by a power analysis of the simulated circuit (such as a dynamic voltage drop analysis or simulation). Signal correlations may also be propagated with the associated time domain information to provide further finer details for use in power analysis. A method according to one embodiment can include: determining, for each input pin of an aggressor element, a set of one or more time dependent input switching probabilities during a set of one or more corresponding timing windows in a simulated representation of a circuit; determining, from each time dependent input switching probability of each timing window, a set of time dependent output switching probabilities at an output pin of the aggressor element; and performing a power analysis for one or more victim circuit elements that are coupled to the aggressor element, the power analysis based on the set of time dependent output switching probabilities at the output pin of the aggressor element.

Timing domain based modeling of switching probability and signal correlation

Analysis of power supply noise in simulations of a design of a circuit can use per instance dynamic voltage drops (DVD) in timing analyses so that the simulated DVD values on a per victim cell basis can accurately guide the timing analysis on each victim instead of a global DVD for all victims during the timing analysis. In one embodiment, a method can: determine, during a power analysis simulation, a representation of an energy lost, during each switching window at each output of each victim cell, at one or more power supply rails of each of the victim cells in the set of victim cells due to aggressors in the design; and provide the representation of the energy lost separately for each victim cell to a timing analysis system. The representation can be a rectangle having a width defined by a switching window of a victim's output.

Dynamic voltage drop model for timing analysis

Systems and methods are provided for simulating quantile behavior of a physical system. A plurality of parameter samples to a physical system are accessed and a subset of the parameter samples are identified, each of the plurality of parameter samples including a variation of parameters for the physical system. The physical system is simulated based on the subset of the parameter samples to generate simulation results, each of the subset of the parameter samples corresponding to a respective one of the simulation results. A neural network is trained to predict the simulation results based on the subset of the parameter samples. Simulation results are predicted for the plurality of parameter samples based on the neural network which has been trained, each of the predicted simulation results corresponding to a respective one of the plurality of parameter samples, and an indicator is generated indicating a quantile simulation result of the physical system according to an ordering relationship among the plurality of simulation results.

Processor-implemented systems using neural networks for simulating high quantile behaviors in physical systems

A system for circuit timing analysis includes a database for holding results of execution of portions of a timing analysis computation. Multiple computation modules are configured for concurrent execution of the portions of a timing analysis computation, for example, a static circuit timing analysis computation. A control subsystem is coupled to the database and to the computation modules, and is configured to receive results of the portions of the computation from the computation modules and to update the database using the received results. Based on the received results, the control module selects further portions of the computations for computation and assign each selected portion to one of the computation modules. The system makes use of parallel processing that is arranged in a way that avoids bottlenecks, such as at least some memory access bottlenecks resulting from data structure locking.

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Southborough, MA, United States of America

Qian Shen