Boe Technology Group Co., Ltd.

Chinese Academy of Sciences

Chengdu Boe Optoelectronics Technology Co., Ltd.

International Business Machines Corporation

Vmware, Inc.

Other

Gm Global Technolgoy Operations, Inc.

Beijing Boe Technology Development Co., Ltd.

Tsinghua University

Intel Corporation

Microsoft Technology Licensing, LLC

Beijing Bytedance Network Technology Co., Ltd.

Beijing Baidu Netcom Science and Technology Co., Ltd.

Huawei Technologies Co., Limited

Beijing Xiaomi Mobile Software Co., Ltd.

Qi Liu

Ming Liu

Wei Zhang

Xiangdan Dong

Tong Zhang

Yan Wu

Chao Li

Jian Li

Fan He

Fan Yang

Bo Zhang

Yue Wang

Lei Wang

Xin Li

Xin Zhou

Jun Yan

Mengmeng Du

Cong Fan

Wei Wang

Yu Zhang

Yi Zhang

Yu Wang

Yan Wang

Jiantao Liu

Lei Guo

Hongwei Ma

Tianyi Cheng

Bo Cheng

Jian Wang

Lei Zhang

Jin Xu

Feng Wu

Qiang Wang

Yang Zhang

Feng Zhang

Liang Chen

Tingliang Liu

Yang Zhou

Jing Liu

Shun Zhang

Xing Zhang

Xueguang Hao

Ke Dai

Yu Liu

Li He

Huijuan Yang

Tinghua Shang

Bin Gao

Hangbing Lv

Shibing Long

Kang Li

Liman Peng

Jilei Gao

Jing Song

Jin Fang Yang

Yonggang Zhang

Zihua Li

Yuqing Yang

Ling Li

Sheng Fang

Jianqiang Wang

Haifeng Xu

Jenne-tai Wang

Liangliang Liu

Qianqian Zhang

Min Wei

Bing Deng

Kun Guo

Yuan Yuan Zhang

Chunxu Zhang

Maoxiu Zhou

Qing Luo

Min Cheng

Jiangsheng Wang

Zhiyong Xue

Hui Li

Ning Li

Kun Zhao

Fei Chen

Shuai Zhang

Chang Zhang

Ming Gao Yao

Chao Xu

Wenbin Yang

Chao Kong

Nan Jiang

Tuo Shi

Yao Li

Jincheng Gao

Jianjun Wu

Weilin Lai

Ji Min Zhang

Ruihua Song

Huaqiang Wu

Chun Li

Zhiyong Yang

Yanhua Wang

Miao Yu

Changqing Xie

Yi Xu

A self-reference storage structure includes: three transistors, including a first transistor T, a second transistor T, and a third transistor T; and two magnetic tunnel junctions, including a first magnetic tunnel junction MTJand a second magnetic tunnel junction MTJ. The first magnetic tunnel junction MTJis connected in series between the first transistor Tand the second transistor T, and the second magnetic tunnel junction MTJis connected in series between the second transistor Tand the third transistor T. When the first transistor T, the second transistor Tand the third transistor Tare turned on, one-bit binary information is written; and when data is stored, one-bit binary write can be implemented only by applying an unidirectional current pulse.

Self-reference storage structure and in-memory computing circuit

A display substrate includes a base substrate and a drive circuit layer, a light-emitting layer, and a touch control layer arranged on the base substrate. The first reset transistor is at least partially covered by a first light shielding structure in a direction away from the base substrate. The first light shielding structure includes a power signal line. And the first reset transistor is at least partially covered by a second light shielding structure in a direction away from the base substrate. The second light shielding structure includes an anode of the light-emitting layer or a metal line of the touch control layer.

Display substrate and display device

A neuron circuit (), including a memristive element (M) used to receive an excitation signal; a trigger element (D) connected to the memristive element (M) and used to receive a clock control signal for the neuron circuit and an output signal of the memristive element (M); a feedback element (T) connected to an output end of the trigger element (D) and an input end of the memristive element (M), and used to control a voltage at the input end of the memristive element (M); and an AND circuit (A) used to perform an AND operation on an output signal of the trigger element (D) and the clock control signal. An output signal of the AND circuit (A) acts as an output signal of the neuron circuit ().

Neuron circuit and neural network circuit

Disclosed is an afferent neuron circuit, which includes: a resistance Rc and a volatile threshold switching device TS, wherein the volatile threshold switching device TS is provided with a parasitic capacitor Cparasitic; a first end of the resistance Rc serves as a signal input terminal, and a second end of the resistance Rc serves as a signal output terminal; and a first end of the volatile threshold switching device TS is connected to the signal output terminal, and a second end of the volatile threshold switching device TS is grounded. The afferent neuron circuit provided in the content of the present disclosure has a simple structure and good scalability and is suitable for large-scale integration.

Afferent neuron circuit and mechanoreceptive system

A display panel having an active area includes: an array substrate and an opposite substrate disposed opposite to the array substrate. The array substrate includes a first substrate and a conductive structure disposed on the first substrate. The conductive structure is located on a side of the active area. On a side of the conductive structure away from the active area, a side surface of the conductive structure is substantially flush with a side surface of the first substrate. On the side where the conductive structure is located, an edge of an orthographic projection of the opposite substrate on a plane where the array substrate is located is located outside an edge of the array substrate.

Display panel including conductive structure and method for manufacturing the same, and display device

Disclosed are an artificial sensory nervous circuit and a manufacturing method thereof. The artificial sensory nervous circuit includes a sensor (S), a first memristor (RS), and a neuron circuit, where the first memristor (RS) has a unidirectional resistance characteristic. The sensor (S) is configured to sensing an external signal and generating an excitation signal according to the external signal. The first memristor (RS) is configured to generating a response signal according to the excitation signal. The neuron circuit is configured to perform charging and discharging according to the response signal so as to output a pulse signal. With the artificial sensory nervous circuit and the manufacturing method thereof, sensitivity and habituation characteristics of biological perception are realized by using a simple circuit.

Artificial sensory nervous circuit and manufacturing method thereof

A display substrate and a display device. The display substrate includes a base substrate, a first metal signal layer and a metal touch layer. The first metal signal line layer includes a plurality of first metal signal lines extending along a first direction, a plurality of metal connection signal lines are included between every two adjacent first metal signal lines. The metal touch layer includes a plurality of grid lines which are intersected. At least one part of each of the plurality of metal connection signal lines is parallel to the plurality of grid lines of the metal touch layer, and in a direction perpendicular to the base substrate, the part of each of the plurality of metal connection signal lines parallel to the plurality of grid lines of the metal touch layer is overlapped with the plurality of grid lines of the metal touch layer.

The present disclosure provides a liquid crystal grating and a driving method therefor, and a three-dimensional (3D) display device. The liquid crystal grating includes: a first substrate; a second substrate, where the second substrate and the first substrate are oppositely arranged; a liquid crystal layer, where the liquid crystal layer is located between the first substrate and the second substrate; and a first transparent grating electrode layer located at a side, facing the liquid crystal layer, of the first substrate; where the first transparent grating electrode layer includes a plurality of first strip-shaped electrodes extending in a first direction and arranged at intervals in a second direction, and each of at least part of the first strip-shaped electrodes is divided in the first direction into at least two first strip-shaped sub-electrodes arranged independently.

Liquid crystal grating and driving method therefor, and 3D display device

A display substrate, a manufacturing method thereof and a display device are provided. The display substrate includes a base substrate, a pixel defining layer and at least one photo spacer. The pixel defining layer is disposed on the base substrate and includes a plurality of openings, the at least one photo spacer is disposed on a side of the pixel defining layer away from the base substrate. A distance from any point at a bottom of the at least one photo spacer contacting the pixel defining layer to an upper edge of a side wall of the plurality of openings is greater than or equal to 5 μm.

Display substrate having photo spacer and pixel defining layer including a plurality of openings and display device

An example method of offloading a compute task to an accelerator by an application executing in a host cluster includes: sending, by an application executing in an initiator host, the compute task to a virtual accelerator in the initiator host, the virtual accelerator paired with a hardware accelerator in a target host of the host cluster; forwarding, by the virtual accelerator, the compute task to the hardware accelerator in the target host over a network; and receiving, at the application via the virtual accelerator, a result of the compute task from the hardware accelerator over the network.

Virtual accelerators in a virtualized computing system

A computing environment can include a host system that maintains a guest system, and a hardware component configured to implement artificial intelligence ('AI') methods of processing and analyzing date. The guest system can provide a virtual computing environment that receives a request to implement an AI application, and utilize a framework and a guest library to convert data from the AI application into an intermediate representation (“IR”). The host system can receive the IR with a virtual device (“VD”), and utilize an IR backend to translate the IR into hardware operations for the hardware component. Translated hardware operations can be provided to, and carried out by, the hardware component to provide an implementation of the AI application. Results of the hardware operations can be transmitted from the VD of the host system to a VD driver of the guest system, virtualizing the hardware component relative to the guest system.

Virtualizing hardware components that implement AI applications

Use of anemoside B4 in the preparation of a medicament for treating acute gouty arthritis.

Pharmaceutical use of anemoside B4 against acute gouty arthritis

A display panel, including: a substrate including a display region and a non-display region; a second conductive layer including more than one gate line located in the display region, and more than one virtual gate line located in the non-display region; a virtual conductive part, located in the non-display region, where the virtual conductive part is located in a different conductive layer from the virtual gate line, an orthographic projection of the virtual conductive part on the substrate is located within an orthographic projection of the virtual gate line on the substrate, and the virtual conductive part is configured to form an equivalent capacitance with the virtual gate line; and a RC load of the virtual gate line matches with a RC load of the gate line.

Display panel and display device with non-display area gate lines to match display area gate lines RC load

Provided are antibodies that specifically bind to TIGIT (T cell immunoreceptor with Ig and ITIM domains, WUCAM or Vstm3) and inhibit Tigit-mediated cellular signaling and activities in immune cells. The anti-TIGIT antibodies can be used to treat or diagnose cancer, infectious diseases or other pathological disorders that may be modulated by Tigit-mediated functions.

Anti-TIGIT antibodies and their use as therapeutics and diagnostics

A display substrate and a display device are provided. The display substrate includes a base substrate, first color sub-pixels, data lines, and first power signal lines located on the base substrate. Each first color sub-pixel includes an organic light emitting element including a first electrode, a light emitting layer and a second electrode. The data lines are located between the second electrode and the base substrate. The first power signal lines are disposed in the same layer as the data lines. The display substrate further includes a first pad block disposed in the same layer as the data lines; the second electrode of each first color sub-pixel is overlapped with the data line, the first power signal line and the first pad block; and the first power signal line and the first pad block are located at both sides of the data line.

Display substrate and display device having low color cast characteristics

Growing community of inventors

Beijing, China

Qi Liu