Cypress Semiconductor Corporation

Qi Gu

Bo Jin

Brenor L Brophy

James E Nulty

Thurman John Rodgers

Thomas A McCleary

John O Torode

In one embodiment, a probe for testing integrated circuits includes a body having a tip and a hardening material on the tip. The hardening material helps improve the hardness of the tip. The hardening material thus allows the probe to reliably penetrate a layer to make a good electrical connection with a contact point under the layer, for example. In one embodiment, an electrically conductive coating is deposited over the hardening material.

Proble for testing integrated circuits

In one embodiment, an environment for testing integrated circuits includes a first die coupled to a tester. The first die includes a removable connection configured to couple a signal from the first die with an adapter layer to a second die being tested. The removable connection may be an elastomeric interposer or a probe, for example.

Probe card with an adapter layer for testing integrated circuits

In one embodiment, a test interface for testing integrated circuits includes an array of dice. A removable electrical connection (e.g., an interposer) may be coupled between the array of dice and a wafer containing multiple dice to be tested. The removable electrical connection allows electrical signals to be transmitted between the array of dice and the wafer. The test interface may be used in conjunction with a tester.

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Fremont, CA, United States of America

Qi Gu