Intel Corporation

Polycom, Inc.

Puneet Singh

Vaibhav Pradip Pande

Arnaud Le Devehat

Kailasnath S Maneparambil

Joel T Yuen

In one general embodiment, a system for enabling communications and conferencing between dissimilar computing devices including mobile computing devices. In another embodiment a method for enabling communications and conferencing between dissimilar computing devices including mobile computing devices. In a further embodiment, a non-transitory computer-readable medium comprising instructions to cause one or more processors to enable communications and conferencing between dissimilar computing devices including mobile computing devices.

System for enabling communications and conferencing between dissimilar computing devices including mobile computing devices

A method and apparatus to analyze noise in a pulse logic digital circuit comprising identifying a channel connected component (CCC) in the pulse logic digital circuit design, said CCC comprising a pulse generator. Modifying the pulse logic digital circuit by disconnecting the pulse generator form an input of the CCC in the pulse logic digital circuit design. Turning on the pulse logic digital circuit, inputting a noise signal to the CCC and monitoring an output of the pulse logic digital circuit during the time the pulse logic digital circuit is turn on.

Method and apparatus to analyze noise in a pulse logic digital circuit design

A scan cell design approach includes removing a formal verification property associated with a scan cell from a set of formal verification properties to create a reduced set of formal verification properties. A formal verification assumption verification process is then performed on a schematic using assumptions generated from the reduced set of formal verification properties. An output of the assumption verification process indicates whether there is a potential contention site at logic coupled to the output of the scan cell.

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San Jose, CA, United States of America

Puneet Singh