Boe Technology Group Co., Ltd.

Ordos Yuansheng Optoelectronics Co., Ltd.

Pucha Zhao

Guoqing Zhang

Hongwei Gao

Xiaopeng Bai

Weifeng Wang

Xiaowei Wang

Hongxia Yang

Ke Zhao

Yanbin Dang

Zhihui Jia

Zhixin Guo

Yan Zong

Haotian Chen

Yaorong Liu

Xingliang Wang

Tao Yang

Jie Wu

Jin Zhao

Shanshan Bao

Yu Fu

Xinxin Jin

Yuebai Han

Longfei Yang

Meili Guo

Feiwen Tian

Xuepeng Ji

Chenwei Wang

Mingyang Zhang

A substrate, a panel, a detection device and an alignment detection method are provided. The substrate includes first signal connection pins arranged in parallel side by side and at least one first alignment detection pin, wherein the at least one first alignment detection pin is located on at least one side of the first signal connection pins in an arrangement direction of the first signal connection pins, and arranged in parallel with the first signal connection pins.

Substrate, panel, detection device and alignment detection method

A test circuitry and a method for testing the same and a test system are provided. The test circuitry includes: a test signal input end, configured to input an initial test signal; a signal output end, configured to output a target test signal; and a signal shaping circuitry coupled to the test signal input end and the signal output end, configured to remove a noise signal from the initial test signal to obtain the target test signal.

Test circuitry and method for testing the same, test system

The present disclosure relates to a method and system for performing aging process on the transistor in the display panel. A method for performing aging process on a transistor in a display panel, comprising: obtaining an initial characteristic curve of the transistor; determining an initial cutoff voltage range of the transistor according to the obtained initial characteristic curve; determining a gate-source voltage and a drain-source voltage required by the transistor according to the initial cutoff voltage range, so as to increase an cutoff voltage range of the transistor; and performing aging process on the transistor according to the determined required gate-source voltage and drain-source voltage.

Method and system for aging process on transistors in a display panel

A set of measurement voltages having different voltage values are subsequently inputted to a measurement voltage input terminal of the pixel driving circuit, a light emitting state of a light emitting device under each measurement voltage is detected, and it is determined whether a storage capacitor in the pixel driving circuit is normal based on the light emitting state of the light emitting device.

Capacitor detection method and pixel driving circuit

The present disclosure provides a signal loading method and a signal generator. The signal loading method includes: loading a first pair of voltage signals to at least one pair of separate signal channels for a time period, respectively, wherein the first pair of voltage signals have a first voltage difference therebetween; and determining whether a short circuit occurs in the at least one pair of signal channels within the time period, and if it is determined that no short circuit occurs in the at least one pair of signal channels within the time period, loading a second pair of voltage signals having a second voltage difference therebetween to the at least one pair of signal channels at the end of the time period. The second voltage difference is greater than the first voltage difference.

Signal loading method and signal generator

The present application discloses a circuit board and a method for manufacturing the same, and a terminal test device. The circuit board includes a base substrate, and a plurality of conductive lines on the base substrate, each of the plurality of conductive lines having one end configured to be connected with a signal output bus of a signal generator and the other end configured to be connected with a terminal. A fuse is connected in series in each conductive line, and a breaking current IT of the fuse, a maximum operating current I of the conductive line and a fault current IF of the conductive line satisfy: I&#x3c;IT&#x2264;IF, where the breaking current IT of the fuse is a minimum current that causes the fuse to open.

Circuit board and method for manufacturing the same, terminal test device

Embodiments of the present disclosure provide a test circuit, a test method, a display panel and a display apparatus. Each of the signal input terminals may input a plurality of signals in a time division multiplexed manner, and in turn may be controlled by the corresponding switches to form a plurality of signal lines, a signal flow of the plurality of signal lines are totally different from each other under control of the switches. For example, one of the signal lines may function as a signal input line, and the other one of the signal lines may function as a signal input line for other specific testing, such as aging process so as to input signals different from the normal turn-on state signals. Consequently, by controlling the corresponding switches through the control signal terminals so that different input signals pass through different signal lines into the display panel to meet testing requirements of normal turn-on state testing, aging process and so on for the display panel. With respect to the prior art, the testing signals may be input without passing through a shift register unit, which avoids damage of a specific testing signal such as aging signal on the shift register unit and ensure a normal displaying function of the display panel.

Test circuit, test method, display panel and display apparatus

Growing community of inventors

Beijing, China

Pucha Zhao