Westinghouse Electric Corporation

Northrop Grumman Systems Corporation

Prosenjit Rai-Choudhury

Stephen J Fonash

Harry Buhay

John Bartko

Ajeet Rohatgi

Kenneth J Petrosky

Dieter K Schroder

John A Costello

Joseph R Gigante

Gene A Madia

Ranbir Singh

Richard R Papania

A heat dissipating module and package for power microwave transistors and method of making same that includes a substrate having a thick copper layer bonded to a ceramic core which is thereto subjected to high processing temperatures.

Thick film copper metallization for microwave power transistor packages

Disclosed is a low temperature technique for annealing implantation damage and activating dopants. Conventional furnace annealing requires temperatures as high as 1000.degree. to 1100.degree. C. to completely anneal the dopant implantation damage; 75 KeV arsenic implantation followed by 550.degree. C. for 75 minutes and 900.degree. C. for 30 minutes in nitrogen for instance is not sufficient to anneal the implantation damage and results in a leakage current of the order of 1 mA per cm.sup.2. If, however, subsequent to the arsenic implantation, 0.4 KeV hydrogen ions are implanted using a Kaufman ion source with an accelerator current of 200 milliamp, then only 500.degree. to 600.degree. C. for one hour anneal in nitrogen is sufficient to eliminate the arsenic implantation damage. This results in a leakage current of the order of 5 to 25 nA per cm.sup.2 and a complete dopant activation is achieved.

Low temperature process for annealing shallow implanted N+/P junctions

A method for eliminating the latch-up effect in integrated circuits having parasitic pnpn structures has been described comprising the step of irradiating the circuit with high energy particulate ions to provide low lifetime regions in the circuit to lower parasitic transistor gain. The invention overcomes the problem of latch-up effect in integrated circuits where parasitic pnpn structures act as thyristors or silicon-controlled rectifiers which provide a low impedance path across the pnpn structure when the thyristor or silicon-controlled rectifier is turned on such as by transient ionizing radiation or by transient circuit voltages which forward bias the external junctions of the pnpn structure.

Method for radiation hardening semiconductor devices and integrated

A semiconductor device such as a film or hybrid integrated circuit is provided having a relatively lightly doped, epitaxially grown silicon layer with a relatively long minority carrier lifetime. The lightly doped silicon layer of less than about 1.times.10.sup.17 per cm.sup.3 is grown on a heavily doped silicon layer of greater than about 1.times.10.sup.19 and preferably greater than about 1.times.10.sup.20 per cm.sup.3 formed with phosphorus or boron impurity. The heavily doped silicon layer is preferably formed, either in a semiconductor body or an epitaxial layer on an insulator substrate, preferably by diffusing the impurity into the body or epitaxial layer. Preferably, the semiconductor device is a thin-film device and most desirably a silicon-on-sapphire device.

Epitaxially grown silicon layers with relatively long minority carrier

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Export, PA, United States of America

Prosenjit Rai-Choudhury