Micron Technology Incorporated

Priya Venkataraman

Scott Anthony Stoller

Pitamber Shukla

Giuseppina Puzzilli

Niccolo′ Righetti

Niccolo' Righetti

Vipul Patel

Read calibration by sector of memory can include reading a page of memory, having more than one sector, with a read level, such as a default read level. In response to an error, such as an uncorrectable error correction code read result, the respective read level can be calibrated for each sector to yield a respective calibrated read level per sector. The page of memory can be read with the respective calibrated read level per sector. The calibrated read levels can be stored.

Read calibration by sector of memory

A method is described that includes determining a number of program and erase cycles associated with a block of pages of a memory device and determining a preprogram voltage based on the number of program and erase cycles to apply to the block of pages prior to an erase operation. The method further includes applying the preprogram voltage to the block of pages and performing an erase operation on the block of pages following application of the preprogram voltage to the block of pages.

Adjusting a preprogram voltage based on use of a memory device

A method and system for temperature-dependent operations in a memory device are described. Temperature measurements of a memory device are recorded. A determination that a temperature measurement of the memory device satisfies a threshold temperature value is performed. In response to the determination, execution of a background operation in the memory device is delayed, and host system operation(s) continue to be executed in the memory device while execution of the background operation is delayed.

Temperature-dependent operations in a memory device

A method is described that includes performing a first erase operation on a set of memory cells of a memory device using an erase voltage, which is set to a first voltage value and adjusting the erase voltage to a second voltage value based on feedback from performance of at least the first erase operation. The method further includes performing a second erase operation on the set of memory cells using the erase voltage, which is set to the second voltage value. In this configuration, the erase voltage set to the second voltage value is an initial voltage applied to the set of memory cells to perform erase operations such that each subsequent erase operation on the set of memory cells following the first erase operation uses an erase voltage that is equal to or greater than the second voltage value when erasing the first set of memory cells.

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Boise, ID, United States of America

Priya Venkataraman