Verigy (singapore) Pte. Ltd.

Preeti Garg

Romi Mayder

Mike Augustin

In one embodiment, a method includes, providing a test program designed to control a circuit test system. The circuit test system has a plurality of test channels, each test channel of which is configured to be selectively coupled to a plurality of sub-channels under control of the test program. The method further includes 1) analyzing the test program to determine what combinations of channels, sub-channels and timing sets are required by the test program, and 2) in response to this analysis, creating a map of which timing sets, for which combinations of channels and sub-channels, should be pre-loaded into pin electronics that correspond to the test channels.

Method and apparatus for determining which timing sets to pre-load into the pin electronics of a circuit test system, and for pre-loading or storing said timing sets

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Sunnyvale, CA, United States of America

Preeti Garg