Samsung Electronics Co., Ltd.

Praveen Rathee

Tamal Das

Sumanth Chakkirala

Vishnu Kalyanamahadevi Gopalan Jawarlal

Sanjeeb Kumar Ghosh

Avneesh Singh Verma

Ankur Ghosh

A system and method to dynamically control a reset signal for an IQ divider are provided. The system includes an IQ divider configured to output a IQ divider output clock; an input configured to receive a reference clock; a failure sensing circuit configured to sense a failure in the IQ divider output clock, the failure sensing circuit including an automatic frequency calibration (AFC) logic; and a control circuit configured to control a reset signal provided to the IQ divider, based on an output of the failure sensing circuit corresponding the failure sensed by the failure sensing circuit.

Method and system of dynamically controlling reset signal of IQ divider

Methods and systems for selecting voltage for a substrate connection of a bypass switch include a bulk voltage generation circuit coupled externally to the regulator. The bulk voltage generation circuit is configured to control selection of a voltage from among an Input/Output (I/O) supply voltage and a core supply voltage for a substrate connection of a bypass switch of the regulator. The bulk voltage generation circuit is configured to select the voltage for the substrate connection of the bypass switch based on a mode of operation of the regulator and at least one of a presence or an arrival sequence of the I/O supply voltage and the core supply voltage.

Methods and systems for selecting voltage for a substrate connection of a bypass switch

Growing community of inventors

Bengaluru, India

Praveen Rathee