Qualcomm Incorporated

Praveen Narendranath

Animesh Datta

Satyanarayana Sahu

Qi Ye

Zhengyu Duan

Steven James Dillen

A pulse generator includes a latch module for storing first/second states, a pulse clock module for generating a clock pulse, and a delay module for delaying the clock pulse at a second latch-module input. The latch module has a first latch-module input coupled to a clock, the second latch-module input, and a latch-module output. The pulse clock module has a first pulse-clock-module input coupled to the clock, a second pulse-clock-module input coupled to the latch-module output, and a pulse-clock-module output. The delay module is coupled between the latch-module output and second pulse-clock-module input or between the pulse-clock-module output and second latch-module input. The delay module provides functionallyat a delay module output, where Iis a function of I and Iis a function of Iand B, and where I is a delay module input, Bis a first input bit, and Iis a first net input.

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San Diego, CA, United States of America

Praveen Narendranath