Intel Corporation

Praveen Mosur

David Sonnier

Stephen T Palermo

William G Burroughs

Edwin Verplanke

Rahul R Shah

Niall D McDonnell

Shrikant M Shah

Bruce Richardson

Chetan Hiremath

Mrittika Ganguli

Abhishek Khade

Gage Eads

Abhirupa Layek

Sarita Maini

Bradley Chaddick

John Mangan

Niall Mcdonnell

Methods, apparatus, systems, and articles of manufacture are disclosed for hardware queue scheduling for multi-core computing environments. An example apparatus includes a first core and a second core of a processor, and circuitry in a die of the processor, at least one of the first core or the second core included in the die, the at least one of the first core or the second core separate from the circuitry, the circuitry to enqueue an identifier to a queue implemented with the circuitry, the identifier associated with a data packet, assign the identifier in the queue to a first core of the processor, and in response to an execution of an operation on the data packet with the first core, provide the identifier to the second core to cause the second core to distribute the data packet.

Hardware queue scheduling for multi-core computing environments

Growing community of inventors

Gilbert, AZ, United States of America

Praveen Mosur